5e74672c09
Some ASIC3 devices in the wild are connected with the address bus shifted by one line, so that its 16-bit registers appear 32-bit aligned in host memory space. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Acked-by: Ian Molton <ian@mnementh.co.uk> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
256 lines
7 KiB
C
256 lines
7 KiB
C
/* Definitons for use with the tmio_mmc.c
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*
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* (c) 2004 Ian Molton <spyro@f2s.com>
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* (c) 2007 Ian Molton <spyro@f2s.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/highmem.h>
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#define CNF_CMD 0x04
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#define CNF_CTL_BASE 0x10
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#define CNF_INT_PIN 0x3d
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#define CNF_STOP_CLK_CTL 0x40
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#define CNF_GCLK_CTL 0x41
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#define CNF_SD_CLK_MODE 0x42
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#define CNF_PIN_STATUS 0x44
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#define CNF_PWR_CTL_1 0x48
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#define CNF_PWR_CTL_2 0x49
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#define CNF_PWR_CTL_3 0x4a
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#define CNF_CARD_DETECT_MODE 0x4c
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#define CNF_SD_SLOT 0x50
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#define CNF_EXT_GCLK_CTL_1 0xf0
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#define CNF_EXT_GCLK_CTL_2 0xf1
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#define CNF_EXT_GCLK_CTL_3 0xf9
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#define CNF_SD_LED_EN_1 0xfa
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#define CNF_SD_LED_EN_2 0xfe
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#define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
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#define CTL_SD_CMD 0x00
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#define CTL_ARG_REG 0x04
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#define CTL_STOP_INTERNAL_ACTION 0x08
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#define CTL_XFER_BLK_COUNT 0xa
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#define CTL_RESPONSE 0x0c
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#define CTL_STATUS 0x1c
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#define CTL_IRQ_MASK 0x20
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#define CTL_SD_CARD_CLK_CTL 0x24
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#define CTL_SD_XFER_LEN 0x26
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#define CTL_SD_MEM_CARD_OPT 0x28
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#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
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#define CTL_SD_DATA_PORT 0x30
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#define CTL_TRANSACTION_CTL 0x34
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#define CTL_RESET_SD 0xe0
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#define CTL_SDIO_REGS 0x100
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#define CTL_CLK_AND_WAIT_CTL 0x138
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#define CTL_RESET_SDIO 0x1e0
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/* Definitions for values the CTRL_STATUS register can take. */
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#define TMIO_STAT_CMDRESPEND 0x00000001
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#define TMIO_STAT_DATAEND 0x00000004
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#define TMIO_STAT_CARD_REMOVE 0x00000008
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#define TMIO_STAT_CARD_INSERT 0x00000010
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#define TMIO_STAT_SIGSTATE 0x00000020
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#define TMIO_STAT_WRPROTECT 0x00000080
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#define TMIO_STAT_CARD_REMOVE_A 0x00000100
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#define TMIO_STAT_CARD_INSERT_A 0x00000200
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#define TMIO_STAT_SIGSTATE_A 0x00000400
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#define TMIO_STAT_CMD_IDX_ERR 0x00010000
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#define TMIO_STAT_CRCFAIL 0x00020000
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#define TMIO_STAT_STOPBIT_ERR 0x00040000
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#define TMIO_STAT_DATATIMEOUT 0x00080000
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#define TMIO_STAT_RXOVERFLOW 0x00100000
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#define TMIO_STAT_TXUNDERRUN 0x00200000
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#define TMIO_STAT_CMDTIMEOUT 0x00400000
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#define TMIO_STAT_RXRDY 0x01000000
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#define TMIO_STAT_TXRQ 0x02000000
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#define TMIO_STAT_ILL_FUNC 0x20000000
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#define TMIO_STAT_CMD_BUSY 0x40000000
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#define TMIO_STAT_ILL_ACCESS 0x80000000
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/* Define some IRQ masks */
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/* This is the mask used at reset by the chip */
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#define TMIO_MASK_ALL 0x837f031d
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#define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND | \
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TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
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#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND | \
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TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
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#define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
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TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
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#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
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#define enable_mmc_irqs(host, i) \
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do { \
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u32 mask;\
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mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
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mask &= ~((i) & TMIO_MASK_IRQ); \
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sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
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} while (0)
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#define disable_mmc_irqs(host, i) \
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do { \
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u32 mask;\
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mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
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mask |= ((i) & TMIO_MASK_IRQ); \
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sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
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} while (0)
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#define ack_mmc_irqs(host, i) \
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do { \
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u32 mask;\
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mask = sd_ctrl_read32((host), CTL_STATUS); \
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mask &= ~((i) & TMIO_MASK_IRQ); \
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sd_ctrl_write32((host), CTL_STATUS, mask); \
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} while (0)
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struct tmio_mmc_host {
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void __iomem *cnf;
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void __iomem *ctl;
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unsigned long bus_shift;
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struct mmc_command *cmd;
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struct mmc_request *mrq;
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struct mmc_data *data;
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struct mmc_host *mmc;
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int irq;
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/* pio related stuff */
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struct scatterlist *sg_ptr;
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unsigned int sg_len;
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unsigned int sg_off;
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};
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#include <linux/io.h>
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static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
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{
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return readw(host->ctl + (addr << host->bus_shift));
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}
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static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
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u16 *buf, int count)
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{
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readsw(host->ctl + (addr << host->bus_shift), buf, count);
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}
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static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr)
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{
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return readw(host->ctl + (addr << host->bus_shift)) |
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readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
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}
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static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
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u16 val)
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{
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writew(val, host->ctl + (addr << host->bus_shift));
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}
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static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
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u16 *buf, int count)
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{
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writesw(host->ctl + (addr << host->bus_shift), buf, count);
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}
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static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr,
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u32 val)
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{
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writew(val, host->ctl + (addr << host->bus_shift));
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writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
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}
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static inline void sd_config_write8(struct tmio_mmc_host *host, int addr,
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u8 val)
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{
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writeb(val, host->cnf + (addr << host->bus_shift));
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}
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static inline void sd_config_write16(struct tmio_mmc_host *host, int addr,
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u16 val)
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{
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writew(val, host->cnf + (addr << host->bus_shift));
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}
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static inline void sd_config_write32(struct tmio_mmc_host *host, int addr,
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u32 val)
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{
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writew(val, host->cnf + (addr << host->bus_shift));
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writew(val >> 16, host->cnf + ((addr + 2) << host->bus_shift));
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}
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#include <linux/scatterlist.h>
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#include <linux/blkdev.h>
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static inline void tmio_mmc_init_sg(struct tmio_mmc_host *host,
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struct mmc_data *data)
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{
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host->sg_len = data->sg_len;
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host->sg_ptr = data->sg;
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host->sg_off = 0;
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}
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static inline int tmio_mmc_next_sg(struct tmio_mmc_host *host)
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{
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host->sg_ptr = sg_next(host->sg_ptr);
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host->sg_off = 0;
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return --host->sg_len;
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}
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static inline char *tmio_mmc_kmap_atomic(struct tmio_mmc_host *host,
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unsigned long *flags)
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{
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struct scatterlist *sg = host->sg_ptr;
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local_irq_save(*flags);
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return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
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}
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static inline void tmio_mmc_kunmap_atomic(struct tmio_mmc_host *host,
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unsigned long *flags)
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{
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kunmap_atomic(sg_page(host->sg_ptr), KM_BIO_SRC_IRQ);
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local_irq_restore(*flags);
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}
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#ifdef CONFIG_MMC_DEBUG
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#define STATUS_TO_TEXT(a) \
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do { \
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if (status & TMIO_STAT_##a) \
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printk(#a); \
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} while (0)
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void pr_debug_status(u32 status)
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{
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printk(KERN_DEBUG "status: %08x = ", status);
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STATUS_TO_TEXT(CARD_REMOVE);
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STATUS_TO_TEXT(CARD_INSERT);
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STATUS_TO_TEXT(SIGSTATE);
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STATUS_TO_TEXT(WRPROTECT);
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STATUS_TO_TEXT(CARD_REMOVE_A);
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STATUS_TO_TEXT(CARD_INSERT_A);
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STATUS_TO_TEXT(SIGSTATE_A);
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STATUS_TO_TEXT(CMD_IDX_ERR);
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STATUS_TO_TEXT(STOPBIT_ERR);
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STATUS_TO_TEXT(ILL_FUNC);
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STATUS_TO_TEXT(CMD_BUSY);
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STATUS_TO_TEXT(CMDRESPEND);
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STATUS_TO_TEXT(DATAEND);
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STATUS_TO_TEXT(CRCFAIL);
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STATUS_TO_TEXT(DATATIMEOUT);
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STATUS_TO_TEXT(CMDTIMEOUT);
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STATUS_TO_TEXT(RXOVERFLOW);
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STATUS_TO_TEXT(TXUNDERRUN);
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STATUS_TO_TEXT(RXRDY);
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STATUS_TO_TEXT(TXRQ);
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STATUS_TO_TEXT(ILL_ACCESS);
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printk("\n");
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}
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#else
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#define pr_debug_status(s) do { } while (0)
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#endif
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