965194c15d
tighten the boundary checks around max_low_pfn_mapped - dont overmap nor undermap into holes. also print out tseg for AMD cpus, for diagnostic purposes. (this is an SMM area, and we split up any big mappings around that area) Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
491 lines
12 KiB
C
491 lines
12 KiB
C
/*
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* Handle caching attributes in page tables (PAT)
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*
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* Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
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* Suresh B Siddha <suresh.b.siddha@intel.com>
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*
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* Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen.
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*/
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#include <linux/mm.h>
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#include <linux/kernel.h>
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#include <linux/gfp.h>
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#include <linux/fs.h>
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#include <linux/bootmem.h>
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#include <asm/msr.h>
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#include <asm/tlbflush.h>
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#include <asm/processor.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/pat.h>
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#include <asm/e820.h>
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#include <asm/cacheflush.h>
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#include <asm/fcntl.h>
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#include <asm/mtrr.h>
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#include <asm/io.h>
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#ifdef CONFIG_X86_PAT
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int __read_mostly pat_enabled = 1;
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void __cpuinit pat_disable(char *reason)
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{
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pat_enabled = 0;
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printk(KERN_INFO "%s\n", reason);
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}
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static int __init nopat(char *str)
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{
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pat_disable("PAT support disabled.");
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return 0;
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}
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early_param("nopat", nopat);
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#endif
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static int debug_enable;
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static int __init pat_debug_setup(char *str)
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{
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debug_enable = 1;
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return 0;
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}
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__setup("debugpat", pat_debug_setup);
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#define dprintk(fmt, arg...) \
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do { if (debug_enable) printk(KERN_INFO fmt, ##arg); } while (0)
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static u64 __read_mostly boot_pat_state;
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enum {
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PAT_UC = 0, /* uncached */
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PAT_WC = 1, /* Write combining */
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PAT_WT = 4, /* Write Through */
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PAT_WP = 5, /* Write Protected */
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PAT_WB = 6, /* Write Back (default) */
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PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */
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};
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#define PAT(x, y) ((u64)PAT_ ## y << ((x)*8))
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void pat_init(void)
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{
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u64 pat;
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if (!pat_enabled)
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return;
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/* Paranoia check. */
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if (!cpu_has_pat && boot_pat_state) {
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/*
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* If this happens we are on a secondary CPU, but
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* switched to PAT on the boot CPU. We have no way to
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* undo PAT.
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*/
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printk(KERN_ERR "PAT enabled, "
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"but not supported by secondary CPU\n");
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BUG();
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}
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/* Set PWT to Write-Combining. All other bits stay the same */
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/*
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* PTE encoding used in Linux:
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* PAT
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* |PCD
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* ||PWT
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* |||
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* 000 WB _PAGE_CACHE_WB
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* 001 WC _PAGE_CACHE_WC
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* 010 UC- _PAGE_CACHE_UC_MINUS
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* 011 UC _PAGE_CACHE_UC
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* PAT bit unused
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*/
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pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |
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PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC);
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/* Boot CPU check */
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if (!boot_pat_state)
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rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
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wrmsrl(MSR_IA32_CR_PAT, pat);
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printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
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smp_processor_id(), boot_pat_state, pat);
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}
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#undef PAT
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static char *cattr_name(unsigned long flags)
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{
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switch (flags & _PAGE_CACHE_MASK) {
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case _PAGE_CACHE_UC: return "uncached";
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case _PAGE_CACHE_UC_MINUS: return "uncached-minus";
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case _PAGE_CACHE_WB: return "write-back";
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case _PAGE_CACHE_WC: return "write-combining";
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default: return "broken";
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}
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}
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/*
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* The global memtype list keeps track of memory type for specific
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* physical memory areas. Conflicting memory types in different
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* mappings can cause CPU cache corruption. To avoid this we keep track.
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*
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* The list is sorted based on starting address and can contain multiple
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* entries for each address (this allows reference counting for overlapping
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* areas). All the aliases have the same cache attributes of course.
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* Zero attributes are represented as holes.
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*
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* Currently the data structure is a list because the number of mappings
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* are expected to be relatively small. If this should be a problem
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* it could be changed to a rbtree or similar.
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*
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* memtype_lock protects the whole list.
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*/
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struct memtype {
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u64 start;
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u64 end;
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unsigned long type;
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struct list_head nd;
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};
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static LIST_HEAD(memtype_list);
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static DEFINE_SPINLOCK(memtype_lock); /* protects memtype list */
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/*
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* Does intersection of PAT memory type and MTRR memory type and returns
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* the resulting memory type as PAT understands it.
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* (Type in pat and mtrr will not have same value)
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* The intersection is based on "Effective Memory Type" tables in IA-32
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* SDM vol 3a
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*/
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static unsigned long pat_x_mtrr_type(u64 start, u64 end, unsigned long req_type)
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{
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/*
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* Look for MTRR hint to get the effective type in case where PAT
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* request is for WB.
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*/
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if (req_type == _PAGE_CACHE_WB) {
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u8 mtrr_type;
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mtrr_type = mtrr_type_lookup(start, end);
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if (mtrr_type == MTRR_TYPE_UNCACHABLE)
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return _PAGE_CACHE_UC;
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if (mtrr_type == MTRR_TYPE_WRCOMB)
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return _PAGE_CACHE_WC;
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}
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return req_type;
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}
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static int chk_conflict(struct memtype *new, struct memtype *entry,
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unsigned long *type)
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{
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if (new->type != entry->type) {
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if (type) {
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new->type = entry->type;
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*type = entry->type;
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} else
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goto conflict;
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}
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/* check overlaps with more than one entry in the list */
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list_for_each_entry_continue(entry, &memtype_list, nd) {
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if (new->end <= entry->start)
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break;
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else if (new->type != entry->type)
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goto conflict;
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}
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return 0;
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conflict:
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printk(KERN_INFO "%s:%d conflicting memory types "
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"%Lx-%Lx %s<->%s\n", current->comm, current->pid, new->start,
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new->end, cattr_name(new->type), cattr_name(entry->type));
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return -EBUSY;
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}
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/*
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* req_type typically has one of the:
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* - _PAGE_CACHE_WB
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* - _PAGE_CACHE_WC
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* - _PAGE_CACHE_UC_MINUS
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* - _PAGE_CACHE_UC
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*
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* req_type will have a special case value '-1', when requester want to inherit
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* the memory type from mtrr (if WB), existing PAT, defaulting to UC_MINUS.
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*
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* If new_type is NULL, function will return an error if it cannot reserve the
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* region with req_type. If new_type is non-NULL, function will return
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* available type in new_type in case of no error. In case of any error
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* it will return a negative return value.
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*/
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int reserve_memtype(u64 start, u64 end, unsigned long req_type,
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unsigned long *new_type)
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{
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struct memtype *new, *entry;
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unsigned long actual_type;
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struct list_head *where;
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int err = 0;
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BUG_ON(start >= end); /* end is exclusive */
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if (!pat_enabled) {
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/* This is identical to page table setting without PAT */
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if (new_type) {
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if (req_type == -1)
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*new_type = _PAGE_CACHE_WB;
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else
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*new_type = req_type & _PAGE_CACHE_MASK;
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}
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return 0;
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}
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/* Low ISA region is always mapped WB in page table. No need to track */
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if (is_ISA_range(start, end - 1)) {
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if (new_type)
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*new_type = _PAGE_CACHE_WB;
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return 0;
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}
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if (req_type == -1) {
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/*
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* Call mtrr_lookup to get the type hint. This is an
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* optimization for /dev/mem mmap'ers into WB memory (BIOS
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* tools and ACPI tools). Use WB request for WB memory and use
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* UC_MINUS otherwise.
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*/
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u8 mtrr_type = mtrr_type_lookup(start, end);
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if (mtrr_type == MTRR_TYPE_WRBACK)
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actual_type = _PAGE_CACHE_WB;
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else
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actual_type = _PAGE_CACHE_UC_MINUS;
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} else
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actual_type = pat_x_mtrr_type(start, end,
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req_type & _PAGE_CACHE_MASK);
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new = kmalloc(sizeof(struct memtype), GFP_KERNEL);
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if (!new)
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return -ENOMEM;
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new->start = start;
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new->end = end;
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new->type = actual_type;
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if (new_type)
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*new_type = actual_type;
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spin_lock(&memtype_lock);
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/* Search for existing mapping that overlaps the current range */
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where = NULL;
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list_for_each_entry(entry, &memtype_list, nd) {
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if (end <= entry->start) {
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where = entry->nd.prev;
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break;
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} else if (start <= entry->start) { /* end > entry->start */
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err = chk_conflict(new, entry, new_type);
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if (!err) {
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dprintk("Overlap at 0x%Lx-0x%Lx\n",
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entry->start, entry->end);
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where = entry->nd.prev;
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}
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break;
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} else if (start < entry->end) { /* start > entry->start */
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err = chk_conflict(new, entry, new_type);
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if (!err) {
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dprintk("Overlap at 0x%Lx-0x%Lx\n",
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entry->start, entry->end);
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where = &entry->nd;
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}
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break;
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}
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}
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if (err) {
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printk(KERN_INFO "reserve_memtype failed 0x%Lx-0x%Lx, "
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"track %s, req %s\n",
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start, end, cattr_name(new->type), cattr_name(req_type));
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kfree(new);
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spin_unlock(&memtype_lock);
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return err;
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}
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if (where)
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list_add(&new->nd, where);
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else
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list_add_tail(&new->nd, &memtype_list);
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spin_unlock(&memtype_lock);
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dprintk("reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n",
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start, end, cattr_name(new->type), cattr_name(req_type),
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new_type ? cattr_name(*new_type) : "-");
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return err;
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}
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int free_memtype(u64 start, u64 end)
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{
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struct memtype *entry;
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int err = -EINVAL;
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if (!pat_enabled)
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return 0;
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/* Low ISA region is always mapped WB. No need to track */
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if (is_ISA_range(start, end - 1))
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return 0;
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spin_lock(&memtype_lock);
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list_for_each_entry(entry, &memtype_list, nd) {
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if (entry->start == start && entry->end == end) {
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list_del(&entry->nd);
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kfree(entry);
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err = 0;
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break;
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}
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}
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spin_unlock(&memtype_lock);
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if (err) {
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printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n",
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current->comm, current->pid, start, end);
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}
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dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end);
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return err;
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}
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/*
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* /dev/mem mmap interface. The memtype used for mapping varies:
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* - Use UC for mappings with O_SYNC flag
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* - Without O_SYNC flag, if there is any conflict in reserve_memtype,
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* inherit the memtype from existing mapping.
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* - Else use UC_MINUS memtype (for backward compatibility with existing
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* X drivers.
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*/
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pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
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unsigned long size, pgprot_t vma_prot)
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{
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return vma_prot;
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}
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#ifdef CONFIG_NONPROMISC_DEVMEM
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/* This check is done in drivers/char/mem.c in case of NONPROMISC_DEVMEM*/
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static inline int range_is_allowed(unsigned long pfn, unsigned long size)
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{
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return 1;
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}
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#else
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static inline int range_is_allowed(unsigned long pfn, unsigned long size)
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{
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u64 from = ((u64)pfn) << PAGE_SHIFT;
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u64 to = from + size;
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u64 cursor = from;
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while (cursor < to) {
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if (!devmem_is_allowed(pfn)) {
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printk(KERN_INFO
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"Program %s tried to access /dev/mem between %Lx->%Lx.\n",
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current->comm, from, to);
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return 0;
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}
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cursor += PAGE_SIZE;
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pfn++;
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}
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return 1;
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}
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#endif /* CONFIG_NONPROMISC_DEVMEM */
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int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
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unsigned long size, pgprot_t *vma_prot)
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{
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u64 offset = ((u64) pfn) << PAGE_SHIFT;
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unsigned long flags = _PAGE_CACHE_UC_MINUS;
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int retval;
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if (!range_is_allowed(pfn, size))
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return 0;
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if (file->f_flags & O_SYNC) {
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flags = _PAGE_CACHE_UC;
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}
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#ifdef CONFIG_X86_32
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/*
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* On the PPro and successors, the MTRRs are used to set
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* memory types for physical addresses outside main memory,
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* so blindly setting UC or PWT on those pages is wrong.
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* For Pentiums and earlier, the surround logic should disable
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* caching for the high addresses through the KEN pin, but
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* we maintain the tradition of paranoia in this code.
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*/
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if (!pat_enabled &&
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!(boot_cpu_has(X86_FEATURE_MTRR) ||
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boot_cpu_has(X86_FEATURE_K6_MTRR) ||
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boot_cpu_has(X86_FEATURE_CYRIX_ARR) ||
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boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) &&
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(pfn << PAGE_SHIFT) >= __pa(high_memory)) {
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flags = _PAGE_CACHE_UC;
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}
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#endif
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/*
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* With O_SYNC, we can only take UC mapping. Fail if we cannot.
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* Without O_SYNC, we want to get
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* - WB for WB-able memory and no other conflicting mappings
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* - UC_MINUS for non-WB-able memory with no other conflicting mappings
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* - Inherit from confliting mappings otherwise
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*/
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if (flags != _PAGE_CACHE_UC_MINUS) {
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retval = reserve_memtype(offset, offset + size, flags, NULL);
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} else {
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retval = reserve_memtype(offset, offset + size, -1, &flags);
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}
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if (retval < 0)
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return 0;
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if (((pfn < max_low_pfn_mapped) ||
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(pfn >= (1UL<<(32 - PAGE_SHIFT)) && pfn < max_pfn_mapped)) &&
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ioremap_change_attr((unsigned long)__va(offset), size, flags) < 0) {
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free_memtype(offset, offset + size);
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printk(KERN_INFO
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"%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n",
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current->comm, current->pid,
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cattr_name(flags),
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offset, (unsigned long long)(offset + size));
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return 0;
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}
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*vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) |
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flags);
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return 1;
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}
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void map_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
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{
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u64 addr = (u64)pfn << PAGE_SHIFT;
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unsigned long flags;
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unsigned long want_flags = (pgprot_val(vma_prot) & _PAGE_CACHE_MASK);
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reserve_memtype(addr, addr + size, want_flags, &flags);
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if (flags != want_flags) {
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printk(KERN_INFO
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"%s:%d /dev/mem expected mapping type %s for %Lx-%Lx, got %s\n",
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current->comm, current->pid,
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cattr_name(want_flags),
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addr, (unsigned long long)(addr + size),
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cattr_name(flags));
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}
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}
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void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
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{
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u64 addr = (u64)pfn << PAGE_SHIFT;
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free_memtype(addr, addr + size);
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}
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