b8edf848e9
Here are more patches in the progression towards multiplatform, sparse irq conversions in particular. Tegra has a handful of cleanups and general groundwork, but is not quite there yet on full enablement. Platforms that are enabled through this branch are VT8500 and Zynq. note that i.MX was converted in one of the earlier cleanup branches as well (before we started a separate topic for multiplatform). And both new platforms for this merge window, sunxi and bcm, were merged with multiplatform support enabled. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQySb/AAoJEIwa5zzehBx3Wo4P/0GrpUhB/qwuhgy43MA2I1Dv tnyuFvsfW9uRExcw2IwT39GFls98QUM9TwQxPqOTHVf+u0LkYMZ9aDeWJOdj3RvG H70Ypj4gZDrzZAFr2TUf8NnYGHd6G2EcMn3261Hjfd7YrswCjsMPvgRns7VOyHCa deif3KcLu3+HzxvuzqlVlTuSAagCQbfqqnTQduMRdJPHT3X3sXwl7ABW+qfOoeYC rjqIbjdh5dB1d/f7igtgBbXjSTnVz/Mr1+wk4rp9Xr1Wv0IXvIaSKjK2Df8ZuNAk aQ6mMy/oDVxlDSrYv0F7lB40/rsZcPqz8+fgYJ2FnvCpIM7z7NeTWD2kQJ2UaQ/s VunShloRxF8It6104EVWZDfEA9NvVBcCALSze0NukqiHZRZYGUzxRNQDrncaksC9 Lm+Z16cUWogsZq7VDCgXYQJeakPQfBDnsx7siMvAbOgvtpSClxuwhdC/czJiix7h BcpA+l5xSviUhHvzHhDt9iJxHjbUmo1xLDvaZSgj2OjAj257JcwaNBCk5BjZTCwe xZmQu1FjwaGtjLiG6QY0WJRsq1hiFRIb/MaWar/WpfqADFqARoambGFUjOl+P4Mu DIM5Z0AS04H+pLuP1QOz/yXxOPEP6Ri36to6XrgzfL/XGet5LW2P59xXxhcWC/OL /3IAcQrsAqh4aGMOstW1 =UJlh -----END PGP SIGNATURE----- Merge tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC multiplatform conversion patches from Olof Johansson: "Here are more patches in the progression towards multiplatform, sparse irq conversions in particular. Tegra has a handful of cleanups and general groundwork, but is not quite there yet on full enablement. Platforms that are enabled through this branch are VT8500 and Zynq. Note that i.MX was converted in one of the earlier cleanup branches as well (before we started a separate topic for multiplatform). And both new platforms for this merge window, sunxi and bcm, were merged with multiplatform support enabled." Fix up conflicts mostly as per Olof. * tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits) ARM: zynq: Remove all unused mach headers ARM: zynq: add support for ARCH_MULTIPLATFORM ARM: zynq: make use of debug_ll_io_init() ARM: zynq: remove TTC early mapping ARM: tegra: move debug-macro.S to include/debug ARM: tegra: don't include iomap.h from debug-macro.S ARM: tegra: decouple uncompress.h and debug-macro.S ARM: tegra: simplify DEBUG_LL UART selection options ARM: tegra: select SPARSE_IRQ ARM: tegra: enhance timer.c to get IO address from device tree ARM: tegra: enhance timer.c to get IRQ info from device tree ARM: timer: fix checkpatch warnings ARM: tegra: add TWD to device tree ARM: tegra: define DT bindings for and instantiate RTC ARM: tegra: define DT bindings for and instantiate timer clocksource/mtu-nomadik: use apb_pclk clk: ux500: Register mtu apb_pclocks ARM: plat-nomadik: convert platforms to SPARSE_IRQ mfd/db8500-prcmu: use the irq_domain_add_simple() mfd/ab8500-core: use irq_domain_add_simple() ...
350 lines
10 KiB
C
350 lines
10 KiB
C
/*
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* Copyright (C) 2008-2009 ST-Ericsson SA
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*
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* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2, as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mfd/abx500/ab8500.h>
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#include <linux/mfd/dbx500-prcmu.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/regulator/machine.h>
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#include <linux/platform_data/pinctrl-nomadik.h>
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#include <linux/random.h>
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#include <asm/pmu.h>
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#include <asm/mach/map.h>
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#include <asm/mach/arch.h>
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#include <asm/hardware/gic.h>
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#include <mach/hardware.h>
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#include <mach/setup.h>
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#include <mach/devices.h>
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#include <mach/db8500-regs.h>
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#include <mach/irqs.h>
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#include "devices-db8500.h"
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#include "ste-dma40-db8500.h"
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#include "board-mop500.h"
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/* minimum static i/o mapping required to boot U8500 platforms */
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static struct map_desc u8500_uart_io_desc[] __initdata = {
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__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
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};
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/* U8500 and U9540 common io_desc */
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static struct map_desc u8500_common_io_desc[] __initdata = {
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/* SCU base also covers GIC CPU BASE and TWD with its 4K page */
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__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
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__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
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};
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/* U8500 IO map specific description */
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static struct map_desc u8500_io_desc[] __initdata = {
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__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
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};
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/* U9540 IO map specific description */
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static struct map_desc u9540_io_desc[] __initdata = {
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__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
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__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
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};
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void __init u8500_map_io(void)
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{
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/*
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* Map the UARTs early so that the DEBUG_LL stuff continues to work.
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*/
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iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
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ux500_map_io();
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iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
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if (cpu_is_ux540_family())
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iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
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else
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iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
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_PRCMU_BASE = __io_address(U8500_PRCMU_BASE);
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}
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static struct resource db8500_pmu_resources[] = {
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[0] = {
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.start = IRQ_DB8500_PMU,
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.end = IRQ_DB8500_PMU,
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.flags = IORESOURCE_IRQ,
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},
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};
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/*
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* The PMU IRQ lines of two cores are wired together into a single interrupt.
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* Bounce the interrupt to the other core if it's not ours.
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*/
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static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
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{
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irqreturn_t ret = handler(irq, dev);
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int other = !smp_processor_id();
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if (ret == IRQ_NONE && cpu_online(other))
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irq_set_affinity(irq, cpumask_of(other));
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/*
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* We should be able to get away with the amount of IRQ_NONEs we give,
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* while still having the spurious IRQ detection code kick in if the
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* interrupt really starts hitting spuriously.
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*/
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return ret;
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}
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struct arm_pmu_platdata db8500_pmu_platdata = {
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.handle_irq = db8500_pmu_handler,
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};
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static struct platform_device db8500_pmu_device = {
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.name = "arm-pmu",
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.id = -1,
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.num_resources = ARRAY_SIZE(db8500_pmu_resources),
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.resource = db8500_pmu_resources,
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.dev.platform_data = &db8500_pmu_platdata,
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};
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static struct platform_device db8500_prcmu_device = {
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.name = "db8500-prcmu",
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};
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static struct platform_device *platform_devs[] __initdata = {
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&u8500_dma40_device,
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&db8500_pmu_device,
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&db8500_prcmu_device,
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};
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static resource_size_t __initdata db8500_gpio_base[] = {
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U8500_GPIOBANK0_BASE,
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U8500_GPIOBANK1_BASE,
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U8500_GPIOBANK2_BASE,
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U8500_GPIOBANK3_BASE,
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U8500_GPIOBANK4_BASE,
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U8500_GPIOBANK5_BASE,
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U8500_GPIOBANK6_BASE,
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U8500_GPIOBANK7_BASE,
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U8500_GPIOBANK8_BASE,
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};
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static void __init db8500_add_gpios(struct device *parent)
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{
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struct nmk_gpio_platform_data pdata = {
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.supports_sleepmode = true,
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};
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dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
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IRQ_DB8500_GPIO0, &pdata);
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dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE);
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}
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static int usb_db8500_rx_dma_cfg[] = {
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DB8500_DMA_DEV38_USB_OTG_IEP_1_9,
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DB8500_DMA_DEV37_USB_OTG_IEP_2_10,
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DB8500_DMA_DEV36_USB_OTG_IEP_3_11,
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DB8500_DMA_DEV19_USB_OTG_IEP_4_12,
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DB8500_DMA_DEV18_USB_OTG_IEP_5_13,
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DB8500_DMA_DEV17_USB_OTG_IEP_6_14,
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DB8500_DMA_DEV16_USB_OTG_IEP_7_15,
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DB8500_DMA_DEV39_USB_OTG_IEP_8
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};
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static int usb_db8500_tx_dma_cfg[] = {
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DB8500_DMA_DEV38_USB_OTG_OEP_1_9,
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DB8500_DMA_DEV37_USB_OTG_OEP_2_10,
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DB8500_DMA_DEV36_USB_OTG_OEP_3_11,
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DB8500_DMA_DEV19_USB_OTG_OEP_4_12,
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DB8500_DMA_DEV18_USB_OTG_OEP_5_13,
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DB8500_DMA_DEV17_USB_OTG_OEP_6_14,
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DB8500_DMA_DEV16_USB_OTG_OEP_7_15,
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DB8500_DMA_DEV39_USB_OTG_OEP_8
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};
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static const char *db8500_read_soc_id(void)
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{
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void __iomem *uid = __io_address(U8500_BB_UID_BASE);
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/* Throw these device-specific numbers into the entropy pool */
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add_device_randomness(uid, 0x14);
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return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
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readl((u32 *)uid+1),
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readl((u32 *)uid+1), readl((u32 *)uid+2),
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readl((u32 *)uid+3), readl((u32 *)uid+4));
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}
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static struct device * __init db8500_soc_device_init(void)
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{
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const char *soc_id = db8500_read_soc_id();
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return ux500_soc_device_init(soc_id);
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}
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/*
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* This function is called from the board init
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*/
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struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
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{
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struct device *parent;
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int i;
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parent = db8500_soc_device_init();
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db8500_add_rtc(parent);
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db8500_add_gpios(parent);
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db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
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for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
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platform_devs[i]->dev.parent = parent;
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db8500_prcmu_device.dev.platform_data = ab8500;
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platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
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return parent;
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}
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#ifdef CONFIG_MACH_UX500_DT
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/* TODO: Once all pieces are DT:ed, remove completely. */
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static struct device * __init u8500_of_init_devices(void)
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{
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struct device *parent = db8500_soc_device_init();
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db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
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u8500_dma40_device.dev.parent = parent;
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/*
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* Devices to be DT:ed:
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* u8500_dma40_device = todo
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* db8500_pmu_device = done
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* db8500_prcmu_device = done
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*/
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platform_device_register(&u8500_dma40_device);
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return parent;
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}
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static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
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/* Requires call-back bindings. */
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OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
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/* Requires DMA bindings. */
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OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
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OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
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OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
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OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
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OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data),
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OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data),
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OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data),
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OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data),
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/* Requires clock name bindings. */
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OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
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OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
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OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
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OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
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OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
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OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
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OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
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OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
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OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
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OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL),
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OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL),
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OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
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OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
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OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
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/* Requires device name bindings. */
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OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
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/* Requires clock name and DMA bindings. */
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OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
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"ux500-msp-i2s.0", &msp0_platform_data),
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OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
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"ux500-msp-i2s.1", &msp1_platform_data),
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OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
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"ux500-msp-i2s.2", &msp2_platform_data),
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OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
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"ux500-msp-i2s.3", &msp3_platform_data),
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{},
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};
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static const struct of_device_id u8500_local_bus_nodes[] = {
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/* only create devices below soc node */
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{ .compatible = "stericsson,db8500", },
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{ .compatible = "stericsson,db8500-prcmu", },
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{ .compatible = "simple-bus"},
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{ },
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};
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static void __init u8500_init_machine(void)
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{
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struct device *parent = NULL;
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/* Pinmaps must be in place before devices register */
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if (of_machine_is_compatible("st-ericsson,mop500"))
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mop500_pinmaps_init();
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else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
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snowball_pinmaps_init();
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else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
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hrefv60_pinmaps_init();
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else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
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/* TODO: Add pinmaps for ccu9540 board. */
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/* TODO: Export SoC, USB, cpu-freq and DMA40 */
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parent = u8500_of_init_devices();
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/* automatically probe child nodes of db8500 device */
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of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent);
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}
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static const char * stericsson_dt_platform_compat[] = {
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"st-ericsson,u8500",
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"st-ericsson,u8540",
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"st-ericsson,u9500",
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"st-ericsson,u9540",
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NULL,
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};
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DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
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.smp = smp_ops(ux500_smp_ops),
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.map_io = u8500_map_io,
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.init_irq = ux500_init_irq,
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/* we re-use nomadik timer here */
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.timer = &ux500_timer,
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.handle_irq = gic_handle_irq,
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.init_machine = u8500_init_machine,
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.init_late = NULL,
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.dt_compat = stericsson_dt_platform_compat,
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MACHINE_END
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#endif
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