f0fba2ad1b
This patch extends the ASoC API to allow sound cards to have more than one
CODEC and more than one platform DMA controller. This is achieved by dividing
some current ASoC structures that contain both driver data and device data into
structures that only either contain device data or driver data. i.e.
struct snd_soc_codec ---> struct snd_soc_codec (device data)
+-> struct snd_soc_codec_driver (driver data)
struct snd_soc_platform ---> struct snd_soc_platform (device data)
+-> struct snd_soc_platform_driver (driver data)
struct snd_soc_dai ---> struct snd_soc_dai (device data)
+-> struct snd_soc_dai_driver (driver data)
struct snd_soc_device ---> deleted
This now allows ASoC to be more tightly aligned with the Linux driver model and
also means that every ASoC codec, platform and (platform) DAI is a kernel
device. ASoC component private data is now stored as device private data.
The ASoC sound card struct snd_soc_card has also been updated to store lists
of it's components rather than a pointer to a codec and platform. The PCM
runtime struct soc_pcm_runtime now has pointers to all its components.
This patch adds DAPM support for ASoC multi-component and removes struct
snd_soc_socdev from DAPM core. All DAPM calls are now made on a card, codec
or runtime PCM level basis rather than using snd_soc_socdev.
Other notable multi-component changes:-
* Stream operations now de-reference less structures.
* close_delayed work() now runs on a DAI basis rather than looping all DAIs
in a card.
* PM suspend()/resume() operations can now handle N CODECs and Platforms
per sound card.
* Added soc_bind_dai_link() to bind the component devices to the sound card.
* Added soc_dai_link_probe() and soc_dai_link_remove() to probe and remove
DAI link components.
* sysfs entries can now be registered per component per card.
* snd_soc_new_pcms() functionailty rolled into dai_link_probe().
* snd_soc_register_codec() now does all the codec list and mutex init.
This patch changes the probe() and remove() of the CODEC drivers as follows:-
o Make CODEC driver a platform driver
o Moved all struct snd_soc_codec list, mutex, etc initialiasation to core.
o Removed all static codec pointers (drivers now support > 1 codec dev)
o snd_soc_register_pcms() now done by core.
o snd_soc_register_dai() folded into snd_soc_register_codec().
CS4270 portions:
Acked-by: Timur Tabi <timur@freescale.com>
Some TLV320aic23 and Cirrus platform fixes.
Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
TI CODEC and OMAP fixes
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Samsung platform and misc fixes :-
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
MPC8610 and PPC fixes.
Signed-off-by: Timur Tabi <timur@freescale.com>
i.MX fixes and some core fixes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
J4740 platform fixes:-
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
CC: Tony Lindgren <tony@atomide.com>
CC: Nicolas Ferre <nicolas.ferre@atmel.com>
CC: Kevin Hilman <khilman@deeprootsystems.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
CC: Kuninori Morimoto <morimoto.kuninori@renesas.com>
CC: Daniel Gloeckner <dg@emlix.com>
CC: Manuel Lauss <mano@roarinelk.homelinux.net>
CC: Mike Frysinger <vapier.adi@gmail.com>
CC: Arnaud Patard <apatard@mandriva.com>
CC: Wan ZongShun <mcuos.com@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
129 lines
4.7 KiB
C
129 lines
4.7 KiB
C
/*
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* mpc8610-pcm.h - ALSA PCM interface for the Freescale MPC8610 SoC
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _MPC8610_PCM_H
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#define _MPC8610_PCM_H
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struct ccsr_dma {
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u8 res0[0x100];
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struct ccsr_dma_channel {
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__be32 mr; /* Mode register */
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__be32 sr; /* Status register */
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__be32 eclndar; /* Current link descriptor extended addr reg */
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__be32 clndar; /* Current link descriptor address register */
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__be32 satr; /* Source attributes register */
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__be32 sar; /* Source address register */
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__be32 datr; /* Destination attributes register */
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__be32 dar; /* Destination address register */
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__be32 bcr; /* Byte count register */
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__be32 enlndar; /* Next link descriptor extended address reg */
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__be32 nlndar; /* Next link descriptor address register */
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u8 res1[4];
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__be32 eclsdar; /* Current list descriptor extended addr reg */
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__be32 clsdar; /* Current list descriptor address register */
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__be32 enlsdar; /* Next list descriptor extended address reg */
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__be32 nlsdar; /* Next list descriptor address register */
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__be32 ssr; /* Source stride register */
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__be32 dsr; /* Destination stride register */
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u8 res2[0x38];
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} channel[4];
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__be32 dgsr;
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};
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#define CCSR_DMA_MR_BWC_DISABLED 0x0F000000
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#define CCSR_DMA_MR_BWC_SHIFT 24
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#define CCSR_DMA_MR_BWC_MASK 0x0F000000
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#define CCSR_DMA_MR_BWC(x) \
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((ilog2(x) << CCSR_DMA_MR_BWC_SHIFT) & CCSR_DMA_MR_BWC_MASK)
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#define CCSR_DMA_MR_EMP_EN 0x00200000
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#define CCSR_DMA_MR_EMS_EN 0x00040000
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#define CCSR_DMA_MR_DAHTS_MASK 0x00030000
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#define CCSR_DMA_MR_DAHTS_1 0x00000000
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#define CCSR_DMA_MR_DAHTS_2 0x00010000
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#define CCSR_DMA_MR_DAHTS_4 0x00020000
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#define CCSR_DMA_MR_DAHTS_8 0x00030000
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#define CCSR_DMA_MR_SAHTS_MASK 0x0000C000
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#define CCSR_DMA_MR_SAHTS_1 0x00000000
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#define CCSR_DMA_MR_SAHTS_2 0x00004000
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#define CCSR_DMA_MR_SAHTS_4 0x00008000
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#define CCSR_DMA_MR_SAHTS_8 0x0000C000
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#define CCSR_DMA_MR_DAHE 0x00002000
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#define CCSR_DMA_MR_SAHE 0x00001000
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#define CCSR_DMA_MR_SRW 0x00000400
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#define CCSR_DMA_MR_EOSIE 0x00000200
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#define CCSR_DMA_MR_EOLNIE 0x00000100
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#define CCSR_DMA_MR_EOLSIE 0x00000080
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#define CCSR_DMA_MR_EIE 0x00000040
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#define CCSR_DMA_MR_XFE 0x00000020
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#define CCSR_DMA_MR_CDSM_SWSM 0x00000010
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#define CCSR_DMA_MR_CA 0x00000008
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#define CCSR_DMA_MR_CTM 0x00000004
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#define CCSR_DMA_MR_CC 0x00000002
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#define CCSR_DMA_MR_CS 0x00000001
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#define CCSR_DMA_SR_TE 0x00000080
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#define CCSR_DMA_SR_CH 0x00000020
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#define CCSR_DMA_SR_PE 0x00000010
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#define CCSR_DMA_SR_EOLNI 0x00000008
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#define CCSR_DMA_SR_CB 0x00000004
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#define CCSR_DMA_SR_EOSI 0x00000002
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#define CCSR_DMA_SR_EOLSI 0x00000001
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/* ECLNDAR takes bits 32-36 of the CLNDAR register */
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static inline u32 CCSR_DMA_ECLNDAR_ADDR(u64 x)
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{
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return (x >> 32) & 0xf;
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}
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#define CCSR_DMA_CLNDAR_ADDR(x) ((x) & 0xFFFFFFFE)
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#define CCSR_DMA_CLNDAR_EOSIE 0x00000008
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/* SATR and DATR, combined */
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#define CCSR_DMA_ATR_PBATMU 0x20000000
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#define CCSR_DMA_ATR_TFLOWLVL_0 0x00000000
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#define CCSR_DMA_ATR_TFLOWLVL_1 0x06000000
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#define CCSR_DMA_ATR_TFLOWLVL_2 0x08000000
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#define CCSR_DMA_ATR_TFLOWLVL_3 0x0C000000
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#define CCSR_DMA_ATR_PCIORDER 0x02000000
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#define CCSR_DMA_ATR_SME 0x01000000
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#define CCSR_DMA_ATR_NOSNOOP 0x00040000
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#define CCSR_DMA_ATR_SNOOP 0x00050000
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#define CCSR_DMA_ATR_ESAD_MASK 0x0000000F
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/**
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* List Descriptor for extended chaining mode DMA operations.
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*
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* The CLSDAR register points to the first (in a linked-list) List
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* Descriptor. Each object must be aligned on a 32-byte boundary. Each
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* list descriptor points to a linked-list of link Descriptors.
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*/
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struct fsl_dma_list_descriptor {
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__be64 next; /* Address of next list descriptor */
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__be64 first_link; /* Address of first link descriptor */
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__be32 source; /* Source stride */
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__be32 dest; /* Destination stride */
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u8 res[8]; /* Reserved */
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} __attribute__ ((aligned(32), packed));
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/**
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* Link Descriptor for basic and extended chaining mode DMA operations.
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*
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* A Link Descriptor points to a single DMA buffer. Each link descriptor
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* must be aligned on a 32-byte boundary.
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*/
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struct fsl_dma_link_descriptor {
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__be32 source_attr; /* Programmed into SATR register */
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__be32 source_addr; /* Programmed into SAR register */
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__be32 dest_attr; /* Programmed into DATR register */
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__be32 dest_addr; /* Programmed into DAR register */
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__be64 next; /* Address of next link descriptor */
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__be32 count; /* Byte count */
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u8 res[4]; /* Reserved */
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} __attribute__ ((aligned(32), packed));
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#endif
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