This patch enables CPU frequency scaling for AT32AP devices. This will
enable the CPU to scale between the speed of the high speed bus and
the master clock and thus save some power.
The patch also adds a parent to cpu_clk and a cpu_clk_set_rate to
enable changing the CPU clock divider in a sane way.
The driver does not check if the given rate is 0, thus resulting in a
div by 0. I think this check should be go into the clk_set_rate
framework, and not here.
Tested on AT32AP7000/ATSTK1000.
Hardware documentation can be found in the AT32AP7000 datasheet.
Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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