3e8214e5c2
This is a cosmetic patch only. Comparison of the resulting binary showed
only line number differences.
This patch does not affect the generation of the Linux binary.
This patch decreases 210 lines of 20121018 divergence.diff.
The ACPICA source codes uses a totally different indentation style from the
Linux to be compatible with other users (operating systems or BIOS).
Indentation differences are critical to the release automation. There are
two causes related to the "indentation" that are affecting the release
automation:
1. The ACPICA -> Linux release process is:
ACPICA source -- acpisrc - hierarchy - indent ->
linuxized ACPICA source -- diff ->
linuxized ACPICA patch (x) -- human intervention ->
linuxized ACPICA patch (o)
Where
'x' means "cannot be directly applied to the Linux"
'o' means "can be directly applied to the Linux"
Different "indent" version or "indent" options used in the "indent"
step will lead to different divergences.
The version of "indent" used for the current release process is:
GNU indent 2.2.11
The options of "indent" used for the current release process is:
-npro -kr -i8 -ts8 -sob -l80 -ss -ncs
2. Manual indentation prettifying work in the Linux side will also harm the
automatically generated linuxized ACPICA patches, making them impossible
to apply directly.
This patch fixes source code differences caused by the two causes so that
the "human intervention" can be reduced in the future.
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
667 lines
20 KiB
C
667 lines
20 KiB
C
/*******************************************************************************
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*
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* Module Name: hwregs - Read/write access functions for the various ACPI
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* control and status registers.
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*
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******************************************************************************/
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/*
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* Copyright (C) 2000 - 2012, Intel Corp.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* substantially similar to the "NO WARRANTY" disclaimer below
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* ("Disclaimer") and any redistribution must be conditioned upon
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* including a substantially similar Disclaimer requirement for further
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* binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <acpi/acpi.h>
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#include "accommon.h"
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#include "acevents.h"
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#define _COMPONENT ACPI_HARDWARE
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ACPI_MODULE_NAME("hwregs")
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#if (!ACPI_REDUCED_HARDWARE)
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/* Local Prototypes */
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static acpi_status
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acpi_hw_read_multiple(u32 *value,
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struct acpi_generic_address *register_a,
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struct acpi_generic_address *register_b);
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static acpi_status
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acpi_hw_write_multiple(u32 value,
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struct acpi_generic_address *register_a,
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struct acpi_generic_address *register_b);
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#endif /* !ACPI_REDUCED_HARDWARE */
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/******************************************************************************
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*
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* FUNCTION: acpi_hw_validate_register
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*
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* PARAMETERS: reg - GAS register structure
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* max_bit_width - Max bit_width supported (32 or 64)
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* address - Pointer to where the gas->address
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* is returned
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*
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* RETURN: Status
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*
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* DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
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* pointer, Address, space_id, bit_width, and bit_offset.
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*
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******************************************************************************/
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acpi_status
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acpi_hw_validate_register(struct acpi_generic_address *reg,
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u8 max_bit_width, u64 *address)
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{
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/* Must have a valid pointer to a GAS structure */
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if (!reg) {
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return (AE_BAD_PARAMETER);
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}
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/*
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* Copy the target address. This handles possible alignment issues.
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* Address must not be null. A null address also indicates an optional
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* ACPI register that is not supported, so no error message.
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*/
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ACPI_MOVE_64_TO_64(address, ®->address);
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if (!(*address)) {
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return (AE_BAD_ADDRESS);
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}
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/* Validate the space_ID */
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if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
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(reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
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ACPI_ERROR((AE_INFO,
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"Unsupported address space: 0x%X", reg->space_id));
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return (AE_SUPPORT);
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}
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/* Validate the bit_width */
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if ((reg->bit_width != 8) &&
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(reg->bit_width != 16) &&
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(reg->bit_width != 32) && (reg->bit_width != max_bit_width)) {
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ACPI_ERROR((AE_INFO,
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"Unsupported register bit width: 0x%X",
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reg->bit_width));
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return (AE_SUPPORT);
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}
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/* Validate the bit_offset. Just a warning for now. */
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if (reg->bit_offset != 0) {
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ACPI_WARNING((AE_INFO,
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"Unsupported register bit offset: 0x%X",
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reg->bit_offset));
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}
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return (AE_OK);
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}
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/******************************************************************************
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*
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* FUNCTION: acpi_hw_read
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*
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* PARAMETERS: value - Where the value is returned
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* reg - GAS register structure
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*
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* RETURN: Status
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*
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* DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
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* version of acpi_read, used internally since the overhead of
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* 64-bit values is not needed.
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*
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* LIMITATIONS: <These limitations also apply to acpi_hw_write>
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* bit_width must be exactly 8, 16, or 32.
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* space_ID must be system_memory or system_IO.
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* bit_offset and access_width are currently ignored, as there has
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* not been a need to implement these.
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*
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******************************************************************************/
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acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
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{
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u64 address;
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u64 value64;
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acpi_status status;
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ACPI_FUNCTION_NAME(hw_read);
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/* Validate contents of the GAS register */
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status = acpi_hw_validate_register(reg, 32, &address);
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if (ACPI_FAILURE(status)) {
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return (status);
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}
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/* Initialize entire 32-bit return value to zero */
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*value = 0;
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/*
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* Two address spaces supported: Memory or IO. PCI_Config is
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* not supported here because the GAS structure is insufficient
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*/
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if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
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status = acpi_os_read_memory((acpi_physical_address)
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address, &value64, reg->bit_width);
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*value = (u32)value64;
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} else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
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status = acpi_hw_read_port((acpi_io_address)
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address, value, reg->bit_width);
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}
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ACPI_DEBUG_PRINT((ACPI_DB_IO,
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"Read: %8.8X width %2d from %8.8X%8.8X (%s)\n",
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*value, reg->bit_width, ACPI_FORMAT_UINT64(address),
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acpi_ut_get_region_name(reg->space_id)));
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return (status);
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}
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/******************************************************************************
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*
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* FUNCTION: acpi_hw_write
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*
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* PARAMETERS: value - Value to be written
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* reg - GAS register structure
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*
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* RETURN: Status
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*
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* DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
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* version of acpi_write, used internally since the overhead of
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* 64-bit values is not needed.
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*
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******************************************************************************/
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acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
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{
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u64 address;
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acpi_status status;
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ACPI_FUNCTION_NAME(hw_write);
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/* Validate contents of the GAS register */
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status = acpi_hw_validate_register(reg, 32, &address);
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if (ACPI_FAILURE(status)) {
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return (status);
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}
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/*
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* Two address spaces supported: Memory or IO. PCI_Config is
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* not supported here because the GAS structure is insufficient
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*/
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if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
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status = acpi_os_write_memory((acpi_physical_address)
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address, (u64)value,
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reg->bit_width);
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} else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
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status = acpi_hw_write_port((acpi_io_address)
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address, value, reg->bit_width);
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}
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ACPI_DEBUG_PRINT((ACPI_DB_IO,
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"Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
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value, reg->bit_width, ACPI_FORMAT_UINT64(address),
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acpi_ut_get_region_name(reg->space_id)));
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return (status);
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}
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#if (!ACPI_REDUCED_HARDWARE)
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/*******************************************************************************
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*
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* FUNCTION: acpi_hw_clear_acpi_status
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*
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* PARAMETERS: None
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*
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* RETURN: Status
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*
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* DESCRIPTION: Clears all fixed and general purpose status bits
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*
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******************************************************************************/
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acpi_status acpi_hw_clear_acpi_status(void)
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{
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acpi_status status;
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acpi_cpu_flags lock_flags = 0;
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ACPI_FUNCTION_TRACE(hw_clear_acpi_status);
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ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
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ACPI_BITMASK_ALL_FIXED_STATUS,
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ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address)));
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lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock);
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/* Clear the fixed events in PM1 A/B */
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status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
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ACPI_BITMASK_ALL_FIXED_STATUS);
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acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags);
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if (ACPI_FAILURE(status))
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goto exit;
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/* Clear the GPE Bits in all GPE registers in all GPE blocks */
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status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL);
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exit:
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return_ACPI_STATUS(status);
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}
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/*******************************************************************************
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*
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* FUNCTION: acpi_hw_get_bit_register_info
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*
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* PARAMETERS: register_id - Index of ACPI Register to access
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*
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* RETURN: The bitmask to be used when accessing the register
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*
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* DESCRIPTION: Map register_id into a register bitmask.
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*
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******************************************************************************/
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struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
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{
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ACPI_FUNCTION_ENTRY();
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if (register_id > ACPI_BITREG_MAX) {
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ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X",
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register_id));
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return (NULL);
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}
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return (&acpi_gbl_bit_register_info[register_id]);
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}
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/******************************************************************************
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*
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* FUNCTION: acpi_hw_write_pm1_control
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*
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* PARAMETERS: pm1a_control - Value to be written to PM1A control
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* pm1b_control - Value to be written to PM1B control
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*
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* RETURN: Status
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*
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* DESCRIPTION: Write the PM1 A/B control registers. These registers are
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* different than than the PM1 A/B status and enable registers
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* in that different values can be written to the A/B registers.
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* Most notably, the SLP_TYP bits can be different, as per the
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* values returned from the _Sx predefined methods.
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*
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******************************************************************************/
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acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control)
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{
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acpi_status status;
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ACPI_FUNCTION_TRACE(hw_write_pm1_control);
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status =
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acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block);
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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if (acpi_gbl_FADT.xpm1b_control_block.address) {
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status =
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acpi_hw_write(pm1b_control,
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&acpi_gbl_FADT.xpm1b_control_block);
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}
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return_ACPI_STATUS(status);
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}
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/******************************************************************************
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*
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* FUNCTION: acpi_hw_register_read
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*
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* PARAMETERS: register_id - ACPI Register ID
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* return_value - Where the register value is returned
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*
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* RETURN: Status and the value read.
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*
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* DESCRIPTION: Read from the specified ACPI register
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*
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******************************************************************************/
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acpi_status acpi_hw_register_read(u32 register_id, u32 *return_value)
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{
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u32 value = 0;
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acpi_status status;
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ACPI_FUNCTION_TRACE(hw_register_read);
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switch (register_id) {
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case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
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status = acpi_hw_read_multiple(&value,
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&acpi_gbl_xpm1a_status,
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&acpi_gbl_xpm1b_status);
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break;
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case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
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status = acpi_hw_read_multiple(&value,
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&acpi_gbl_xpm1a_enable,
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&acpi_gbl_xpm1b_enable);
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break;
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case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
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status = acpi_hw_read_multiple(&value,
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&acpi_gbl_FADT.
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xpm1a_control_block,
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&acpi_gbl_FADT.
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xpm1b_control_block);
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/*
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* Zero the write-only bits. From the ACPI specification, "Hardware
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* Write-Only Bits": "Upon reads to registers with write-only bits,
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* software masks out all write-only bits."
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*/
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value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
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break;
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case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
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status =
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acpi_hw_read(&value, &acpi_gbl_FADT.xpm2_control_block);
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break;
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case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
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status = acpi_hw_read(&value, &acpi_gbl_FADT.xpm_timer_block);
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break;
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case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
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status =
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acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8);
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break;
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default:
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ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
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status = AE_BAD_PARAMETER;
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break;
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}
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if (ACPI_SUCCESS(status)) {
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*return_value = value;
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}
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return_ACPI_STATUS(status);
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}
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/******************************************************************************
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*
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* FUNCTION: acpi_hw_register_write
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*
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* PARAMETERS: register_id - ACPI Register ID
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* value - The value to write
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*
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* RETURN: Status
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*
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* DESCRIPTION: Write to the specified ACPI register
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*
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* NOTE: In accordance with the ACPI specification, this function automatically
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* preserves the value of the following bits, meaning that these bits cannot be
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* changed via this interface:
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*
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* PM1_CONTROL[0] = SCI_EN
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* PM1_CONTROL[9]
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* PM1_STATUS[11]
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*
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* ACPI References:
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* 1) Hardware Ignored Bits: When software writes to a register with ignored
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* bit fields, it preserves the ignored bit fields
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* 2) SCI_EN: OSPM always preserves this bit position
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*
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******************************************************************************/
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acpi_status acpi_hw_register_write(u32 register_id, u32 value)
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{
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acpi_status status;
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u32 read_value;
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ACPI_FUNCTION_TRACE(hw_register_write);
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switch (register_id) {
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case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
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/*
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* Handle the "ignored" bit in PM1 Status. According to the ACPI
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* specification, ignored bits are to be preserved when writing.
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* Normally, this would mean a read/modify/write sequence. However,
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* preserving a bit in the status register is different. Writing a
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* one clears the status, and writing a zero preserves the status.
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* Therefore, we must always write zero to the ignored bit.
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*
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* This behavior is clarified in the ACPI 4.0 specification.
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*/
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value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
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status = acpi_hw_write_multiple(value,
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&acpi_gbl_xpm1a_status,
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&acpi_gbl_xpm1b_status);
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break;
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case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
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status = acpi_hw_write_multiple(value,
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&acpi_gbl_xpm1a_enable,
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&acpi_gbl_xpm1b_enable);
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break;
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case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
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/*
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* Perform a read first to preserve certain bits (per ACPI spec)
|
|
* Note: This includes SCI_EN, we never want to change this bit
|
|
*/
|
|
status = acpi_hw_read_multiple(&read_value,
|
|
&acpi_gbl_FADT.
|
|
xpm1a_control_block,
|
|
&acpi_gbl_FADT.
|
|
xpm1b_control_block);
|
|
if (ACPI_FAILURE(status)) {
|
|
goto exit;
|
|
}
|
|
|
|
/* Insert the bits to be preserved */
|
|
|
|
ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS,
|
|
read_value);
|
|
|
|
/* Now we can write the data */
|
|
|
|
status = acpi_hw_write_multiple(value,
|
|
&acpi_gbl_FADT.
|
|
xpm1a_control_block,
|
|
&acpi_gbl_FADT.
|
|
xpm1b_control_block);
|
|
break;
|
|
|
|
case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
|
|
|
|
/*
|
|
* For control registers, all reserved bits must be preserved,
|
|
* as per the ACPI spec.
|
|
*/
|
|
status =
|
|
acpi_hw_read(&read_value,
|
|
&acpi_gbl_FADT.xpm2_control_block);
|
|
if (ACPI_FAILURE(status)) {
|
|
goto exit;
|
|
}
|
|
|
|
/* Insert the bits to be preserved */
|
|
|
|
ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS,
|
|
read_value);
|
|
|
|
status =
|
|
acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block);
|
|
break;
|
|
|
|
case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
|
|
|
|
status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block);
|
|
break;
|
|
|
|
case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
|
|
|
|
/* SMI_CMD is currently always in IO space */
|
|
|
|
status =
|
|
acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8);
|
|
break;
|
|
|
|
default:
|
|
ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
|
|
status = AE_BAD_PARAMETER;
|
|
break;
|
|
}
|
|
|
|
exit:
|
|
return_ACPI_STATUS(status);
|
|
}
|
|
|
|
/******************************************************************************
|
|
*
|
|
* FUNCTION: acpi_hw_read_multiple
|
|
*
|
|
* PARAMETERS: value - Where the register value is returned
|
|
* register_a - First ACPI register (required)
|
|
* register_b - Second ACPI register (optional)
|
|
*
|
|
* RETURN: Status
|
|
*
|
|
* DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
|
|
*
|
|
******************************************************************************/
|
|
|
|
static acpi_status
|
|
acpi_hw_read_multiple(u32 *value,
|
|
struct acpi_generic_address *register_a,
|
|
struct acpi_generic_address *register_b)
|
|
{
|
|
u32 value_a = 0;
|
|
u32 value_b = 0;
|
|
acpi_status status;
|
|
|
|
/* The first register is always required */
|
|
|
|
status = acpi_hw_read(&value_a, register_a);
|
|
if (ACPI_FAILURE(status)) {
|
|
return (status);
|
|
}
|
|
|
|
/* Second register is optional */
|
|
|
|
if (register_b->address) {
|
|
status = acpi_hw_read(&value_b, register_b);
|
|
if (ACPI_FAILURE(status)) {
|
|
return (status);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* OR the two return values together. No shifting or masking is necessary,
|
|
* because of how the PM1 registers are defined in the ACPI specification:
|
|
*
|
|
* "Although the bits can be split between the two register blocks (each
|
|
* register block has a unique pointer within the FADT), the bit positions
|
|
* are maintained. The register block with unimplemented bits (that is,
|
|
* those implemented in the other register block) always returns zeros,
|
|
* and writes have no side effects"
|
|
*/
|
|
*value = (value_a | value_b);
|
|
return (AE_OK);
|
|
}
|
|
|
|
/******************************************************************************
|
|
*
|
|
* FUNCTION: acpi_hw_write_multiple
|
|
*
|
|
* PARAMETERS: value - The value to write
|
|
* register_a - First ACPI register (required)
|
|
* register_b - Second ACPI register (optional)
|
|
*
|
|
* RETURN: Status
|
|
*
|
|
* DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
|
|
*
|
|
******************************************************************************/
|
|
|
|
static acpi_status
|
|
acpi_hw_write_multiple(u32 value,
|
|
struct acpi_generic_address *register_a,
|
|
struct acpi_generic_address *register_b)
|
|
{
|
|
acpi_status status;
|
|
|
|
/* The first register is always required */
|
|
|
|
status = acpi_hw_write(value, register_a);
|
|
if (ACPI_FAILURE(status)) {
|
|
return (status);
|
|
}
|
|
|
|
/*
|
|
* Second register is optional
|
|
*
|
|
* No bit shifting or clearing is necessary, because of how the PM1
|
|
* registers are defined in the ACPI specification:
|
|
*
|
|
* "Although the bits can be split between the two register blocks (each
|
|
* register block has a unique pointer within the FADT), the bit positions
|
|
* are maintained. The register block with unimplemented bits (that is,
|
|
* those implemented in the other register block) always returns zeros,
|
|
* and writes have no side effects"
|
|
*/
|
|
if (register_b->address) {
|
|
status = acpi_hw_write(value, register_b);
|
|
}
|
|
|
|
return (status);
|
|
}
|
|
|
|
#endif /* !ACPI_REDUCED_HARDWARE */
|