25c1a411e8
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
68 lines
1.8 KiB
C
68 lines
1.8 KiB
C
#ifndef _ASM_X86_TIMER_H
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#define _ASM_X86_TIMER_H
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#include <linux/init.h>
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#include <linux/pm.h>
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#include <linux/percpu.h>
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#include <linux/interrupt.h>
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#define TICK_SIZE (tick_nsec / 1000)
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unsigned long long native_sched_clock(void);
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unsigned long native_calibrate_tsc(void);
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#ifdef CONFIG_X86_32
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extern int timer_ack;
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extern irqreturn_t timer_interrupt(int irq, void *dev_id);
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#endif /* CONFIG_X86_32 */
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extern int recalibrate_cpu_khz(void);
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extern int no_timer_check;
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#ifndef CONFIG_PARAVIRT
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#define calibrate_tsc() native_calibrate_tsc()
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#endif
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/* Accelerators for sched_clock()
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* convert from cycles(64bits) => nanoseconds (64bits)
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* basic equation:
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* ns = cycles / (freq / ns_per_sec)
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* ns = cycles * (ns_per_sec / freq)
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* ns = cycles * (10^9 / (cpu_khz * 10^3))
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* ns = cycles * (10^6 / cpu_khz)
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*
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* Then we use scaling math (suggested by george@mvista.com) to get:
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* ns = cycles * (10^6 * SC / cpu_khz) / SC
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* ns = cycles * cyc2ns_scale / SC
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*
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* And since SC is a constant power of two, we can convert the div
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* into a shift.
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*
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* We can use khz divisor instead of mhz to keep a better precision, since
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* cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
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* (mathieu.desnoyers@polymtl.ca)
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*
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* -johnstul@us.ibm.com "math is hard, lets go shopping!"
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*/
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DECLARE_PER_CPU(unsigned long, cyc2ns);
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#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
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static inline unsigned long long __cycles_2_ns(unsigned long long cyc)
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{
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return cyc * per_cpu(cyc2ns, smp_processor_id()) >> CYC2NS_SCALE_FACTOR;
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}
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static inline unsigned long long cycles_2_ns(unsigned long long cyc)
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{
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unsigned long long ns;
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unsigned long flags;
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local_irq_save(flags);
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ns = __cycles_2_ns(cyc);
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local_irq_restore(flags);
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return ns;
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}
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#endif /* _ASM_X86_TIMER_H */
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