69 lines
2.1 KiB
C
69 lines
2.1 KiB
C
/*
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* Copyright (C) 2005 - 2008 ServerEngines
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation. The full GNU General
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* Public License is included in this distribution in the file called COPYING.
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*
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* Contact Information:
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* linux-drivers@serverengines.com
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*
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* ServerEngines
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* 209 N. Fair Oaks Ave
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* Sunnyvale, CA 94085
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*/
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/*
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* Autogenerated by srcgen version: 0127
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*/
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#ifndef __regmap_amap_h__
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#define __regmap_amap_h__
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#include "pcicfg.h"
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#include "ep.h"
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#include "cev.h"
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#include "mpu.h"
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#include "doorbells.h"
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/*
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* This is the control and status register map for BladeEngine, showing
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* the relative size and offset of each sub-module. The CSR registers
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* are identical for the network and storage PCI functions. The
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* CSR map is shown below, followed by details of each block,
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* in sub-sections. The sub-sections begin with a description
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* of CSRs that are instantiated in multiple blocks.
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*/
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struct BE_BLADE_ENGINE_CSRMAP_AMAP {
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struct BE_MPU_CSRMAP_AMAP mpu;
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u8 rsvd0[8192]; /* DWORD 256 */
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u8 rsvd1[8192]; /* DWORD 512 */
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struct BE_CEV_CSRMAP_AMAP cev;
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u8 rsvd2[8192]; /* DWORD 1024 */
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u8 rsvd3[8192]; /* DWORD 1280 */
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u8 rsvd4[8192]; /* DWORD 1536 */
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u8 rsvd5[8192]; /* DWORD 1792 */
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u8 rsvd6[8192]; /* DWORD 2048 */
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u8 rsvd7[8192]; /* DWORD 2304 */
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u8 rsvd8[8192]; /* DWORD 2560 */
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u8 rsvd9[8192]; /* DWORD 2816 */
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u8 rsvd10[8192]; /* DWORD 3072 */
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u8 rsvd11[8192]; /* DWORD 3328 */
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u8 rsvd12[8192]; /* DWORD 3584 */
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u8 rsvd13[8192]; /* DWORD 3840 */
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u8 rsvd14[8192]; /* DWORD 4096 */
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u8 rsvd15[8192]; /* DWORD 4352 */
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u8 rsvd16[8192]; /* DWORD 4608 */
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u8 rsvd17[8192]; /* DWORD 4864 */
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u8 rsvd18[8192]; /* DWORD 5120 */
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u8 rsvd19[8192]; /* DWORD 5376 */
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u8 rsvd20[8192]; /* DWORD 5632 */
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u8 rsvd21[8192]; /* DWORD 5888 */
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u8 rsvd22[8192]; /* DWORD 6144 */
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u8 rsvd23[17152][32]; /* DWORD 6400 */
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} __packed;
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struct BLADE_ENGINE_CSRMAP_AMAP {
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u32 dw[23552];
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};
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#endif /* __regmap_amap_h__ */
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