775c322087
Add device tree bindings so that the gpio-nand driver may be instantiated from the device tree. This also allows the partitions to be specified in the device tree. v7: - restore runtime device tree/non device tree detection v6: - convert to mtd_device_parse_register() v5: - fold dt config helpers into a single gpio_nand_of_get_config() v4: - get io sync address from gpio-control-nand,io-sync-reg property rather than a resource - clarified a few details in the binding v3: - remove redundant cast and a couple of whitespace/naming changes v2: - add CONFIG_OF guards for non-dt platforms - compatible becomes gpio-control-nand - clarify some binding details Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
44 lines
1.5 KiB
Text
44 lines
1.5 KiB
Text
GPIO assisted NAND flash
|
|
|
|
The GPIO assisted NAND flash uses a memory mapped interface to
|
|
read/write the NAND commands and data and GPIO pins for the control
|
|
signals.
|
|
|
|
Required properties:
|
|
- compatible : "gpio-control-nand"
|
|
- reg : should specify localbus chip select and size used for the chip. The
|
|
resource describes the data bus connected to the NAND flash and all accesses
|
|
are made in native endianness.
|
|
- #address-cells, #size-cells : Must be present if the device has sub-nodes
|
|
representing partitions.
|
|
- gpios : specifies the gpio pins to control the NAND device. nwp is an
|
|
optional gpio and may be set to 0 if not present.
|
|
|
|
Optional properties:
|
|
- bank-width : Width (in bytes) of the device. If not present, the width
|
|
defaults to 1 byte.
|
|
- chip-delay : chip dependent delay for transferring data from array to
|
|
read registers (tR). If not present then a default of 20us is used.
|
|
- gpio-control-nand,io-sync-reg : A 64-bit physical address for a read
|
|
location used to guard against bus reordering with regards to accesses to
|
|
the GPIO's and the NAND flash data bus. If present, then after changing
|
|
GPIO state and before and after command byte writes, this register will be
|
|
read to ensure that the GPIO accesses have completed.
|
|
|
|
Examples:
|
|
|
|
gpio-nand@1,0 {
|
|
compatible = "gpio-control-nand";
|
|
reg = <1 0x0000 0x2>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
gpios = <&banka 1 0 /* rdy */
|
|
&banka 2 0 /* nce */
|
|
&banka 3 0 /* ale */
|
|
&banka 4 0 /* cle */
|
|
0 /* nwp */>;
|
|
|
|
partition@0 {
|
|
...
|
|
};
|
|
};
|