df2634f43f
History: v1..v2: - dropped device_type except for cpu & pci. I have the compatible string for pci so I can drop the device_type once it is possible - I lowercased all compatible types. I will need to resend some patches which have upper case intel - The cpu had the same compatible string as the soc node. So I added to the soc node -immr for internel memory mapped registers. - I added generic names for all parts. - I reworked the i2c bars matching the way you suggested. I added a compatible node for the PCI device which only the PCI ids in its compatible string. The bars (each represents a complete i2c controller) have a "intel,ce4100-i2c-controller" compatible node. It is not used by the driver. The driver is probed via PCI ids (by the pci subsystem not OF) and matches the bar address against the ressource in the child node. Once there is a hit the node is attached. - The SPI driver is also probed via pci. However I also attached a compatible property based on PCI ids v2..v3: - intel,ce4100-immr become intel,ce4100-cp. cp stands for core peripherals. The Atom data sheet talks here about ACPI devices. Since we don't have ACPI this does not apply here. - The interrupt map is gone. There are now plenty of device nodes. - The "unit address string" got fixed, it uses not DD,V format. v3..v4: - added descriptions for compatible nodes introduced here: - intel,ce4100-ioapic - intel,ce4100-lapic - intel,ce4100-hpet - intel,ce4100 - intel,ce4100-cp - intel,ce4100-pci - added a description about I2C controller magic. - Added gpio-controller and gpio-cells property to gpio devices. Those properties are not (yet) used. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: sodaville@linutronix.de Cc: devicetree-discuss@lists.ozlabs.org LKML-Reference: <1298405266-1624-4-git-send-email-bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
93 lines
2.7 KiB
Text
93 lines
2.7 KiB
Text
CE4100 I2C
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----------
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CE4100 has one PCI device which is described as the I2C-Controller. This
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PCI device has three PCI-bars, each bar contains a complete I2C
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controller. So we have a total of three independent I2C-Controllers
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which share only an interrupt line.
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The driver is probed via the PCI-ID and is gathering the information of
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attached devices from the devices tree.
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Grant Likely recommended to use the ranges property to map the PCI-Bar
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number to its physical address and to use this to find the child nodes
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of the specific I2C controller. This were his exact words:
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Here's where the magic happens. Each entry in
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ranges describes how the parent pci address space
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(middle group of 3) is translated to the local
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address space (first group of 2) and the size of
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each range (last cell). In this particular case,
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the first cell of the local address is chosen to be
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1:1 mapped to the BARs, and the second is the
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offset from be base of the BAR (which would be
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non-zero if you had 2 or more devices mapped off
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the same BAR)
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ranges allows the address mapping to be described
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in a way that the OS can interpret without
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requiring custom device driver code.
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This is an example which is used on FalconFalls:
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------------------------------------------------
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i2c-controller@b,2 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "pci8086,2e68.2",
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"pci8086,2e68",
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"pciclass,ff0000",
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"pciclass,ff00";
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reg = <0x15a00 0x0 0x0 0x0 0x0>;
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interrupts = <16 1>;
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/* as described by Grant, the first number in the group of
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* three is the bar number followed by the 64bit bar address
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* followed by size of the mapping. The bar address
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* requires also a valid translation in parents ranges
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* property.
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*/
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ranges = <0 0 0x02000000 0 0xdffe0500 0x100
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1 0 0x02000000 0 0xdffe0600 0x100
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2 0 0x02000000 0 0xdffe0700 0x100>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "intel,ce4100-i2c-controller";
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/* The first number in the reg property is the
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* number of the bar
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*/
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reg = <0 0 0x100>;
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/* This I2C controller has no devices */
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};
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i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "intel,ce4100-i2c-controller";
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reg = <1 0 0x100>;
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/* This I2C controller has one gpio controller */
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gpio@26 {
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#gpio-cells = <2>;
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compatible = "ti,pcf8575";
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reg = <0x26>;
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gpio-controller;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "intel,ce4100-i2c-controller";
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reg = <2 0 0x100>;
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gpio@26 {
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#gpio-cells = <2>;
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compatible = "ti,pcf8575";
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reg = <0x26>;
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gpio-controller;
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};
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};
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};
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