0214394760
This simplifies the way that the book3s_pr makes the transition to real mode when entering the guest. We now call kvmppc_entry_trampoline (renamed from kvmppc_rmcall) in the base kernel using a normal function call instead of doing an indirect call through a pointer in the vcpu. If kvm is a module, the module loader takes care of generating a trampoline as it does for other calls to functions outside the module. kvmppc_entry_trampoline then disables interrupts and jumps to kvmppc_handler_trampoline_enter in real mode using an rfi[d]. That then uses the link register as the address to return to (potentially in module space) when the guest exits. This also simplifies the way that we call the Linux interrupt handler when we exit the guest due to an external, decrementer or performance monitor interrupt. Instead of turning on the MMU, then deciding that we need to call the Linux handler and turning the MMU back off again, we now go straight to the handler at the point where we would turn the MMU on. The handler will then return to the virtual-mode code (potentially in the module). Along the way, this moves the setting and clearing of the HID5 DCBZ32 bit into real-mode interrupts-off code, and also makes sure that we clear the MSR[RI] bit before loading values into SRR0/1. The net result is that we no longer need any code addresses to be stored in vcpu->arch. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
167 lines
4.1 KiB
ArmAsm
167 lines
4.1 KiB
ArmAsm
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright SUSE Linux Products GmbH 2009
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*
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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#define SHADOW_SLB_ESID(num) (SLBSHADOW_SAVEAREA + (num * 0x10))
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#define SHADOW_SLB_VSID(num) (SLBSHADOW_SAVEAREA + (num * 0x10) + 0x8)
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#define UNBOLT_SLB_ENTRY(num) \
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ld r9, SHADOW_SLB_ESID(num)(r12); \
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/* Invalid? Skip. */; \
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rldicl. r0, r9, 37, 63; \
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beq slb_entry_skip_ ## num; \
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xoris r9, r9, SLB_ESID_V@h; \
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std r9, SHADOW_SLB_ESID(num)(r12); \
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slb_entry_skip_ ## num:
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#define REBOLT_SLB_ENTRY(num) \
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ld r10, SHADOW_SLB_ESID(num)(r11); \
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cmpdi r10, 0; \
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beq slb_exit_skip_ ## num; \
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oris r10, r10, SLB_ESID_V@h; \
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ld r9, SHADOW_SLB_VSID(num)(r11); \
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slbmte r9, r10; \
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std r10, SHADOW_SLB_ESID(num)(r11); \
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slb_exit_skip_ ## num:
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/******************************************************************************
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* *
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* Entry code *
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* *
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*****************************************************************************/
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.macro LOAD_GUEST_SEGMENTS
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/* Required state:
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*
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* MSR = ~IR|DR
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* R13 = PACA
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* R1 = host R1
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* R2 = host R2
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* R3 = shadow vcpu
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* all other volatile GPRS = free except R4, R6
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* SVCPU[CR] = guest CR
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* SVCPU[XER] = guest XER
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* SVCPU[CTR] = guest CTR
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* SVCPU[LR] = guest LR
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*/
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/* Remove LPAR shadow entries */
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#if SLB_NUM_BOLTED == 3
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ld r12, PACA_SLBSHADOWPTR(r13)
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/* Save off the first entry so we can slbie it later */
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ld r10, SHADOW_SLB_ESID(0)(r12)
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ld r11, SHADOW_SLB_VSID(0)(r12)
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/* Remove bolted entries */
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UNBOLT_SLB_ENTRY(0)
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UNBOLT_SLB_ENTRY(1)
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UNBOLT_SLB_ENTRY(2)
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#else
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#error unknown number of bolted entries
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#endif
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/* Flush SLB */
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slbia
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/* r0 = esid & ESID_MASK */
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rldicr r10, r10, 0, 35
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/* r0 |= CLASS_BIT(VSID) */
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rldic r12, r11, 56 - 36, 36
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or r10, r10, r12
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slbie r10
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isync
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/* Fill SLB with our shadow */
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lbz r12, SVCPU_SLB_MAX(r3)
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mulli r12, r12, 16
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addi r12, r12, SVCPU_SLB
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add r12, r12, r3
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/* for (r11 = kvm_slb; r11 < kvm_slb + kvm_slb_size; r11+=slb_entry) */
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li r11, SVCPU_SLB
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add r11, r11, r3
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slb_loop_enter:
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ld r10, 0(r11)
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rldicl. r0, r10, 37, 63
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beq slb_loop_enter_skip
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ld r9, 8(r11)
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slbmte r9, r10
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slb_loop_enter_skip:
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addi r11, r11, 16
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cmpd cr0, r11, r12
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blt slb_loop_enter
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slb_do_enter:
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.endm
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/******************************************************************************
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* *
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* Exit code *
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* *
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*****************************************************************************/
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.macro LOAD_HOST_SEGMENTS
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/* Register usage at this point:
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*
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* R1 = host R1
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* R2 = host R2
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* R12 = exit handler id
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* R13 = shadow vcpu - SHADOW_VCPU_OFF [=PACA on PPC64]
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* SVCPU.* = guest *
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* SVCPU[CR] = guest CR
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* SVCPU[XER] = guest XER
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* SVCPU[CTR] = guest CTR
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* SVCPU[LR] = guest LR
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*
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*/
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/* Restore bolted entries from the shadow and fix it along the way */
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/* We don't store anything in entry 0, so we don't need to take care of it */
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slbia
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isync
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#if SLB_NUM_BOLTED == 3
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ld r11, PACA_SLBSHADOWPTR(r13)
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REBOLT_SLB_ENTRY(0)
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REBOLT_SLB_ENTRY(1)
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REBOLT_SLB_ENTRY(2)
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#else
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#error unknown number of bolted entries
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#endif
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slb_do_exit:
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.endm
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