158 lines
3.5 KiB
C
158 lines
3.5 KiB
C
#include "drmP.h"
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#include "drm.h"
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#include "nouveau_drv.h"
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#include "nouveau_drm.h"
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struct nv50_fb_priv {
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struct page *r100c08_page;
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dma_addr_t r100c08;
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};
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static void
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nv50_fb_destroy(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
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struct nv50_fb_priv *priv = pfb->priv;
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if (drm_mm_initialized(&pfb->tag_heap))
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drm_mm_takedown(&pfb->tag_heap);
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if (priv->r100c08_page) {
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pci_unmap_page(dev->pdev, priv->r100c08, PAGE_SIZE,
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PCI_DMA_BIDIRECTIONAL);
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__free_page(priv->r100c08_page);
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}
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kfree(priv);
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pfb->priv = NULL;
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}
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static int
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nv50_fb_create(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
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struct nv50_fb_priv *priv;
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u32 tagmem;
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int ret;
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priv = kzalloc(sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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pfb->priv = priv;
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priv->r100c08_page = alloc_page(GFP_KERNEL | __GFP_ZERO);
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if (!priv->r100c08_page) {
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nv50_fb_destroy(dev);
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return -ENOMEM;
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}
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priv->r100c08 = pci_map_page(dev->pdev, priv->r100c08_page, 0,
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PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
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if (pci_dma_mapping_error(dev->pdev, priv->r100c08)) {
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nv50_fb_destroy(dev);
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return -EFAULT;
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}
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tagmem = nv_rd32(dev, 0x100320);
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NV_DEBUG(dev, "%d tags available\n", tagmem);
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ret = drm_mm_init(&pfb->tag_heap, 0, tagmem);
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if (ret) {
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nv50_fb_destroy(dev);
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return ret;
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}
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return 0;
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}
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int
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nv50_fb_init(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nv50_fb_priv *priv;
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int ret;
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if (!dev_priv->engine.fb.priv) {
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ret = nv50_fb_create(dev);
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if (ret)
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return ret;
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}
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priv = dev_priv->engine.fb.priv;
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/* Not a clue what this is exactly. Without pointing it at a
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* scratch page, VRAM->GART blits with M2MF (as in DDX DFS)
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* cause IOMMU "read from address 0" errors (rh#561267)
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*/
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nv_wr32(dev, 0x100c08, priv->r100c08 >> 8);
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/* This is needed to get meaningful information from 100c90
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* on traps. No idea what these values mean exactly. */
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switch (dev_priv->chipset) {
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case 0x50:
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nv_wr32(dev, 0x100c90, 0x000707ff);
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break;
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case 0xa3:
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case 0xa5:
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case 0xa8:
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nv_wr32(dev, 0x100c90, 0x000d0fff);
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break;
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case 0xaf:
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nv_wr32(dev, 0x100c90, 0x089d1fff);
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break;
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default:
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nv_wr32(dev, 0x100c90, 0x001d07ff);
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break;
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}
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return 0;
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}
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void
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nv50_fb_takedown(struct drm_device *dev)
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{
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nv50_fb_destroy(dev);
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}
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void
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nv50_fb_vm_trap(struct drm_device *dev, int display, const char *name)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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unsigned long flags;
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u32 trap[6], idx, chinst;
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int i, ch;
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idx = nv_rd32(dev, 0x100c90);
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if (!(idx & 0x80000000))
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return;
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idx &= 0x00ffffff;
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for (i = 0; i < 6; i++) {
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nv_wr32(dev, 0x100c90, idx | i << 24);
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trap[i] = nv_rd32(dev, 0x100c94);
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}
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nv_wr32(dev, 0x100c90, idx | 0x80000000);
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if (!display)
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return;
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chinst = (trap[2] << 16) | trap[1];
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spin_lock_irqsave(&dev_priv->channels.lock, flags);
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for (ch = 0; ch < dev_priv->engine.fifo.channels; ch++) {
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struct nouveau_channel *chan = dev_priv->channels.ptr[ch];
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if (!chan || !chan->ramin)
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continue;
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if (chinst == chan->ramin->vinst >> 12)
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break;
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}
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spin_unlock_irqrestore(&dev_priv->channels.lock, flags);
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NV_INFO(dev, "%s - VM: Trapped %s at %02x%04x%04x status %08x "
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"channel %d (0x%08x)\n",
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name, (trap[5] & 0x100 ? "read" : "write"),
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trap[5] & 0xff, trap[4] & 0xffff, trap[3] & 0xffff,
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trap[0], ch, chinst);
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}
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