Jesse Barnes 8d31528703 drm/i915: Use PIPE_CONTROL for flushing on gen6+. ... v2 by danvet: Use a new flag to flush the render target cache on gen6+ (hw reuses the old write flush bit), as suggested by Ben Widawsdy. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> [danvet: this seems to fix cairo-perf-trace hangs on my snb] Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Keith Packard <keithp@keithp.com>		2011-10-20 15:26:41 -07:00
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drm	drm/i915: Use PIPE_CONTROL for flushing on gen6+.	2011-10-20 15:26:41 -07:00
stub	i915: select VIDEO_OUTPUT_CONTROL for ACPI_VIDEO	2011-04-13 09:10:25 +10:00
vga	drivers: use kzalloc/kcalloc instead of 'kmalloc+memset', where possible	2011-07-25 20:57:13 -07:00
Makefile	gpu: Add Intel GMA500(Poulsbo) Stub Driver	2010-10-26 11:00:13 +10:00