480fe1a31c
The chip executes microcode present in internal RAM, whose content is loaded from EEPROM on power cycle. This patch allows an update of the microcode through PIO without forcing a power cycle. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: Jeff Garzik <jeff@garzik.org> |
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| .. | ||
| Makefile | ||
| adapter.h | ||
| ael1002.c | ||
| common.h | ||
| cxgb3_ctl_defs.h | ||
| cxgb3_defs.h | ||
| cxgb3_ioctl.h | ||
| cxgb3_main.c | ||
| cxgb3_offload.c | ||
| cxgb3_offload.h | ||
| firmware_exports.h | ||
| l2t.c | ||
| l2t.h | ||
| mc5.c | ||
| regs.h | ||
| sge.c | ||
| sge_defs.h | ||
| t3_cpl.h | ||
| t3_hw.c | ||
| t3cdev.h | ||
| version.h | ||
| vsc8211.c | ||
| xgmac.c | ||