6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
105 lines
2.9 KiB
C
105 lines
2.9 KiB
C
/*
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* arch/v850/kernel/rte_ma1_cb.c -- Midas labs RTE-V850E/MA1-CB board
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*
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* Copyright (C) 2001,02,03 NEC Electronics Corporation
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* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* Written by Miles Bader <miles@gnu.org>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/bootmem.h>
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#include <asm/atomic.h>
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#include <asm/page.h>
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#include <asm/ma1.h>
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#include <asm/rte_ma1_cb.h>
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#include <asm/v850e_timer_c.h>
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#include "mach.h"
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/* SRAM and SDRAM are almost contiguous (with a small hole in between;
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see mach_reserve_bootmem for details), so just use both as one big area. */
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#define RAM_START SRAM_ADDR
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#define RAM_END (SDRAM_ADDR + SDRAM_SIZE)
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void __init mach_early_init (void)
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{
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rte_cb_early_init ();
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}
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void __init mach_get_physical_ram (unsigned long *ram_start,
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unsigned long *ram_len)
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{
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*ram_start = RAM_START;
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*ram_len = RAM_END - RAM_START;
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}
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void __init mach_reserve_bootmem ()
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{
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#ifdef CONFIG_RTE_CB_MULTI
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/* Prevent the kernel from touching the monitor's scratch RAM. */
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reserve_bootmem (MON_SCRATCH_ADDR, MON_SCRATCH_SIZE);
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#endif
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/* The space between SRAM and SDRAM is filled with duplicate
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images of SRAM. Prevent the kernel from using them. */
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reserve_bootmem (SRAM_ADDR + SRAM_SIZE,
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SDRAM_ADDR - (SRAM_ADDR + SRAM_SIZE));
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}
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void mach_gettimeofday (struct timespec *tv)
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{
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tv->tv_sec = 0;
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tv->tv_nsec = 0;
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}
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/* Called before configuring an on-chip UART. */
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void rte_ma1_cb_uart_pre_configure (unsigned chan,
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unsigned cflags, unsigned baud)
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{
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/* The RTE-MA1-CB connects some general-purpose I/O pins on the
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CPU to the RTS/CTS lines of UART 0's serial connection.
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I/O pins P42 and P43 are RTS and CTS respectively. */
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if (chan == 0) {
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/* Put P42 & P43 in I/O port mode. */
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MA_PORT4_PMC &= ~0xC;
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/* Make P42 an output, and P43 an input. */
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MA_PORT4_PM = (MA_PORT4_PM & ~0xC) | 0x8;
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}
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/* Do pre-configuration for the actual UART. */
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ma_uart_pre_configure (chan, cflags, baud);
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}
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void __init mach_init_irqs (void)
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{
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unsigned tc;
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/* Initialize interrupts. */
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ma_init_irqs ();
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rte_cb_init_irqs ();
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/* Use falling-edge-sensitivity for interrupts . */
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V850E_TIMER_C_SESC (0) &= ~0xC;
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V850E_TIMER_C_SESC (1) &= ~0xF;
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/* INTP000-INTP011 are shared with `Timer C', so we have to set
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up Timer C to pass them through as raw interrupts. */
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for (tc = 0; tc < 2; tc++)
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/* Turn on the timer. */
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V850E_TIMER_C_TMCC0 (tc) |= V850E_TIMER_C_TMCC0_CAE;
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/* Make sure the relevant port0/port1 pins are assigned
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interrupt duty. We used INTP001-INTP011 (don't screw with
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INTP000 because the monitor uses it). */
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MA_PORT0_PMC |= 0x4; /* P02 (INTP001) in IRQ mode. */
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MA_PORT1_PMC |= 0x6; /* P11 (INTP010) & P12 (INTP011) in IRQ mode.*/
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}
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