bd5ce43323
1. introduce folder of 'arch/arm/plat-pxa' for common code across different
PXA processor families
2. initially moved DMA code into plat-pxa
3. common code in <mach/dma.h> moved into <plat/dma.h>, new processors
should implement its own <mach/dma.h>, provide the following required
definitions and '#include <plat/dma.h>' in the end:
- DMAC_REGS_VIRT for mapped virtual address of the DMA registers'
physical I/O memory
Signed-off-by: Eric Miao <eric.miao@marvell.com>
144 lines
3.3 KiB
C
144 lines
3.3 KiB
C
/*
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* linux/arch/arm/plat-pxa/dma.c
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*
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* PXA DMA registration and IRQ dispatching
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*
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* Author: Nicolas Pitre
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* Created: Nov 15, 2001
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* Copyright: MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/errno.h>
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#include <asm/system.h>
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#include <asm/irq.h>
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#include <mach/hardware.h>
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#include <mach/dma.h>
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struct dma_channel {
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char *name;
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pxa_dma_prio prio;
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void (*irq_handler)(int, void *);
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void *data;
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};
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static struct dma_channel *dma_channels;
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static int num_dma_channels;
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int pxa_request_dma (char *name, pxa_dma_prio prio,
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void (*irq_handler)(int, void *),
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void *data)
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{
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unsigned long flags;
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int i, found = 0;
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/* basic sanity checks */
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if (!name || !irq_handler)
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return -EINVAL;
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local_irq_save(flags);
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do {
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/* try grabbing a DMA channel with the requested priority */
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for (i = 0; i < num_dma_channels; i++) {
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if ((dma_channels[i].prio == prio) &&
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!dma_channels[i].name) {
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found = 1;
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break;
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}
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}
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/* if requested prio group is full, try a hier priority */
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} while (!found && prio--);
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if (found) {
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DCSR(i) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
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dma_channels[i].name = name;
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dma_channels[i].irq_handler = irq_handler;
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dma_channels[i].data = data;
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} else {
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printk (KERN_WARNING "No more available DMA channels for %s\n", name);
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i = -ENODEV;
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}
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local_irq_restore(flags);
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return i;
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}
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void pxa_free_dma (int dma_ch)
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{
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unsigned long flags;
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if (!dma_channels[dma_ch].name) {
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printk (KERN_CRIT
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"%s: trying to free channel %d which is already freed\n",
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__func__, dma_ch);
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return;
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}
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local_irq_save(flags);
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DCSR(dma_ch) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
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dma_channels[dma_ch].name = NULL;
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local_irq_restore(flags);
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}
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static irqreturn_t dma_irq_handler(int irq, void *dev_id)
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{
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int i, dint = DINT;
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for (i = 0; i < num_dma_channels; i++) {
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if (dint & (1 << i)) {
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struct dma_channel *channel = &dma_channels[i];
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if (channel->name && channel->irq_handler) {
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channel->irq_handler(i, channel->data);
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} else {
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/*
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* IRQ for an unregistered DMA channel:
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* let's clear the interrupts and disable it.
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*/
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printk (KERN_WARNING "spurious IRQ for DMA channel %d\n", i);
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DCSR(i) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
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}
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}
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}
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return IRQ_HANDLED;
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}
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int __init pxa_init_dma(int irq, int num_ch)
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{
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int i, ret;
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dma_channels = kzalloc(sizeof(struct dma_channel) * num_ch, GFP_KERNEL);
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if (dma_channels == NULL)
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return -ENOMEM;
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/* dma channel priorities on pxa2xx processors:
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* ch 0 - 3, 16 - 19 <--> (0) DMA_PRIO_HIGH
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* ch 4 - 7, 20 - 23 <--> (1) DMA_PRIO_MEDIUM
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* ch 8 - 15, 24 - 31 <--> (2) DMA_PRIO_LOW
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*/
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for (i = 0; i < num_ch; i++) {
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DCSR(i) = 0;
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dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW);
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}
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ret = request_irq(irq, dma_irq_handler, IRQF_DISABLED, "DMA", NULL);
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if (ret) {
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printk (KERN_CRIT "Wow! Can't register IRQ for DMA\n");
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kfree(dma_channels);
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return ret;
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}
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num_dma_channels = num_ch;
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return 0;
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}
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EXPORT_SYMBOL(pxa_request_dma);
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EXPORT_SYMBOL(pxa_free_dma);
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