da065a0b36
This makes gpio.c fully independent of pxa-regs.h (except for the virtual address of the registers). Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Eric Miao <eric.miao@marvell.com>
160 lines
3.9 KiB
C
160 lines
3.9 KiB
C
/*
|
|
* linux/arch/arm/mach-pxa/generic.c
|
|
*
|
|
* Author: Nicolas Pitre
|
|
* Created: Jun 15, 2001
|
|
* Copyright: MontaVista Software Inc.
|
|
*
|
|
* Code common to all PXA machines.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* Since this file should be linked before any other machine specific file,
|
|
* the __initcall() here will be executed first. This serves as default
|
|
* initialization stuff for PXA machines which can be overridden later if
|
|
* need be.
|
|
*/
|
|
#include <linux/module.h>
|
|
#include <linux/kernel.h>
|
|
#include <linux/init.h>
|
|
|
|
#include <mach/hardware.h>
|
|
#include <asm/system.h>
|
|
#include <asm/pgtable.h>
|
|
#include <asm/mach/map.h>
|
|
#include <asm/mach-types.h>
|
|
|
|
#include <mach/reset.h>
|
|
#include <mach/gpio.h>
|
|
#include <mach/pxa2xx-gpio.h>
|
|
|
|
#include "generic.h"
|
|
|
|
void clear_reset_status(unsigned int mask)
|
|
{
|
|
if (cpu_is_pxa2xx())
|
|
pxa2xx_clear_reset_status(mask);
|
|
|
|
if (cpu_is_pxa3xx())
|
|
pxa3xx_clear_reset_status(mask);
|
|
}
|
|
|
|
unsigned long get_clock_tick_rate(void)
|
|
{
|
|
unsigned long clock_tick_rate;
|
|
|
|
if (cpu_is_pxa25x())
|
|
clock_tick_rate = 3686400;
|
|
else if (machine_is_mainstone())
|
|
clock_tick_rate = 3249600;
|
|
else
|
|
clock_tick_rate = 3250000;
|
|
|
|
return clock_tick_rate;
|
|
}
|
|
EXPORT_SYMBOL(get_clock_tick_rate);
|
|
|
|
/*
|
|
* Get the clock frequency as reflected by CCCR and the turbo flag.
|
|
* We assume these values have been applied via a fcs.
|
|
* If info is not 0 we also display the current settings.
|
|
*/
|
|
unsigned int get_clk_frequency_khz(int info)
|
|
{
|
|
if (cpu_is_pxa25x())
|
|
return pxa25x_get_clk_frequency_khz(info);
|
|
else if (cpu_is_pxa27x())
|
|
return pxa27x_get_clk_frequency_khz(info);
|
|
else
|
|
return pxa3xx_get_clk_frequency_khz(info);
|
|
}
|
|
EXPORT_SYMBOL(get_clk_frequency_khz);
|
|
|
|
/*
|
|
* Return the current memory clock frequency in units of 10kHz
|
|
*/
|
|
unsigned int get_memclk_frequency_10khz(void)
|
|
{
|
|
if (cpu_is_pxa25x())
|
|
return pxa25x_get_memclk_frequency_10khz();
|
|
else if (cpu_is_pxa27x())
|
|
return pxa27x_get_memclk_frequency_10khz();
|
|
else
|
|
return pxa3xx_get_memclk_frequency_10khz();
|
|
}
|
|
EXPORT_SYMBOL(get_memclk_frequency_10khz);
|
|
|
|
/*
|
|
* Intel PXA2xx internal register mapping.
|
|
*
|
|
* Note 1: not all PXA2xx variants implement all those addresses.
|
|
*
|
|
* Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
|
|
* and cache flush area.
|
|
*/
|
|
static struct map_desc standard_io_desc[] __initdata = {
|
|
{ /* Devs */
|
|
.virtual = 0xf2000000,
|
|
.pfn = __phys_to_pfn(0x40000000),
|
|
.length = 0x02000000,
|
|
.type = MT_DEVICE
|
|
}, { /* Mem Ctl */
|
|
.virtual = 0xf6000000,
|
|
.pfn = __phys_to_pfn(0x48000000),
|
|
.length = 0x00200000,
|
|
.type = MT_DEVICE
|
|
}, { /* Camera */
|
|
.virtual = 0xfa000000,
|
|
.pfn = __phys_to_pfn(0x50000000),
|
|
.length = 0x00100000,
|
|
.type = MT_DEVICE
|
|
}, { /* IMem ctl */
|
|
.virtual = 0xfe000000,
|
|
.pfn = __phys_to_pfn(0x58000000),
|
|
.length = 0x00100000,
|
|
.type = MT_DEVICE
|
|
}, { /* UNCACHED_PHYS_0 */
|
|
.virtual = 0xff000000,
|
|
.pfn = __phys_to_pfn(0x00000000),
|
|
.length = 0x00100000,
|
|
.type = MT_DEVICE
|
|
}
|
|
};
|
|
|
|
void __init pxa_map_io(void)
|
|
{
|
|
iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
|
|
get_clk_frequency_khz(1);
|
|
}
|
|
|
|
/*
|
|
* Configure pins for GPIO or other functions
|
|
*/
|
|
int pxa_gpio_mode(int gpio_mode)
|
|
{
|
|
unsigned long flags;
|
|
int gpio = gpio_mode & GPIO_MD_MASK_NR;
|
|
int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
|
|
int gafr;
|
|
|
|
if (gpio > pxa_last_gpio)
|
|
return -EINVAL;
|
|
|
|
local_irq_save(flags);
|
|
if (gpio_mode & GPIO_DFLT_LOW)
|
|
GPCR(gpio) = GPIO_bit(gpio);
|
|
else if (gpio_mode & GPIO_DFLT_HIGH)
|
|
GPSR(gpio) = GPIO_bit(gpio);
|
|
if (gpio_mode & GPIO_MD_MASK_DIR)
|
|
GPDR(gpio) |= GPIO_bit(gpio);
|
|
else
|
|
GPDR(gpio) &= ~GPIO_bit(gpio);
|
|
gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
|
|
GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
|
|
local_irq_restore(flags);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(pxa_gpio_mode);
|