5ddcb3c35b
TX39XX and TX49XX have "reserved" segment in CKSEG3 area. 0xff000000-0xff3fffff on TX49XX and 0xff000000-0xfffeffff on TX39XX are reserved (unmapped, uncached). Controllers on these SoCs are placed in this segment. This patch add plat_ioremap() and plat_iounmap() to override default behavior and implement these hooks for TX39/TX49. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
42 lines
1 KiB
C
42 lines
1 KiB
C
/*
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* include/asm-mips/mach-au1x00/ioremap.h
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef __ASM_MACH_AU1X00_IOREMAP_H
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#define __ASM_MACH_AU1X00_IOREMAP_H
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#include <linux/types.h>
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#ifdef CONFIG_64BIT_PHYS_ADDR
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extern phys_t __fixup_bigphys_addr(phys_t, phys_t);
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#else
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static inline phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
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{
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return phys_addr;
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}
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#endif
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/*
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* Allow physical addresses to be fixed up to help 36-bit peripherals.
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*/
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static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
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{
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return __fixup_bigphys_addr(phys_addr, size);
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}
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static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
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unsigned long flags)
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{
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return NULL;
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}
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static inline int plat_iounmap(const volatile void __iomem *addr)
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{
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return 0;
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}
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#endif /* __ASM_MACH_AU1X00_IOREMAP_H */
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