703 lines
21 KiB
C
703 lines
21 KiB
C
/*****************************************************************************
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(c) Cambridge Silicon Radio Limited 2011
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All rights reserved and confidential information of CSR
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Refer to LICENSE.txt included with this source for details
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on the license terms.
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*****************************************************************************/
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/*
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* ---------------------------------------------------------------------------
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*
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* FILE: csr_wifi_hip_card_sdio.h
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*
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* PURPOSE:
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* Internal header for Card API for SDIO.
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* ---------------------------------------------------------------------------
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*/
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#ifndef __CARD_SDIO_H__
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#define __CARD_SDIO_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "csr_wifi_hip_unifi.h"
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#include "csr_wifi_hip_unifi_udi.h"
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#include "csr_wifi_hip_unifihw.h"
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#include "csr_wifi_hip_unifiversion.h"
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#ifndef CSR_WIFI_HIP_TA_DISABLE
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#include "csr_wifi_hip_ta_sampling.h"
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#endif
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#include "csr_wifi_hip_xbv.h"
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#include "csr_wifi_hip_chiphelper.h"
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/*
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*
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* Configuration items.
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* Which of these should go in a platform unifi_config.h file?
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*
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*/
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/*
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* When the traffic queues contain more signals than there is space for on
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* UniFi, a limiting algorithm comes into play.
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* If a traffic queue has enough slots free to buffer more traffic from the
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* network stack, then the following check is applied. The number of free
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* slots is RESUME_XMIT_THRESHOLD.
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*/
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#define RESUME_XMIT_THRESHOLD 4
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/*
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* When reading signals from UniFi, the host processes pending all signals
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* and then acknowledges them together in a single write to update the
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* to-host-chunks-read location.
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* When there is more than one bulk data transfer (e.g. one received data
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* packet and a request for the payload data of a transmitted packet), the
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* update can be delayed significantly. This ties up resources on chip.
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*
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* To remedy this problem, to-host-chunks-read is updated after processing
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* a signal if TO_HOST_FLUSH_THRESHOLD bytes of bulk data have been
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* transferred since the last update.
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*/
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#define TO_HOST_FLUSH_THRESHOLD (500 * 5)
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/* SDIO Card Common Control Registers */
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#define SDIO_CCCR_SDIO_REVISION (0x00)
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#define SDIO_SD_SPEC_REVISION (0x01)
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#define SDIO_IO_ENABLE (0x02)
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#define SDIO_IO_READY (0x03)
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#define SDIO_INT_ENABLE (0x04)
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#define SDIO_INT_PENDING (0x05)
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#define SDIO_IO_ABORT (0x06)
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#define SDIO_BUS_IFACE_CONTROL (0x07)
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#define SDIO_CARD_CAPABILOTY (0x08)
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#define SDIO_COMMON_CIS_POINTER (0x09)
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#define SDIO_BUS_SUSPEND (0x0C)
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#define SDIO_FUNCTION_SELECT (0x0D)
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#define SDIO_EXEC_FLAGS (0x0E)
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#define SDIO_READY_FLAGS (0x0F)
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#define SDIO_FN0_BLOCK_SIZE (0x10)
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#define SDIO_POWER_CONTROL (0x12)
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#define SDIO_VENDOR_START (0xF0)
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#define SDIO_CSR_HOST_WAKEUP (0xf0)
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#define SDIO_CSR_HOST_INT_CLEAR (0xf1)
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#define SDIO_CSR_FROM_HOST_SCRATCH0 (0xf2)
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#define SDIO_CSR_FROM_HOST_SCRATCH1 (0xf3)
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#define SDIO_CSR_TO_HOST_SCRATCH0 (0xf4)
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#define SDIO_CSR_TO_HOST_SCRATCH1 (0xf5)
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#define SDIO_CSR_FUNC_EN (0xf6)
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#define SDIO_CSR_CSPI_MODE (0xf7)
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#define SDIO_CSR_CSPI_STATUS (0xf8)
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#define SDIO_CSR_CSPI_PADDING (0xf9)
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#define UNIFI_SD_INT_ENABLE_IENM 0x0001 /* Master INT Enable */
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#ifdef CSR_PRE_ALLOC_NET_DATA
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#define BULK_DATA_PRE_ALLOC_NUM 16
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#endif
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/*
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* Structure to hold configuration information read from UniFi.
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*/
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typedef struct
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{
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/*
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* The version of the SDIO signal queues and bulk data pools
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* configuration structure. The MSB is the major version number, used to
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* indicate incompatible changes. The LSB gives the minor revision number,
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* used to indicate changes that maintain backwards compatibility.
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*/
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CsrUint16 version;
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/*
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* offset from the start of the shared data memory to the SD IO
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* control structure.
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*/
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CsrUint16 sdio_ctrl_offset;
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/* Buffer handle of the from-host signal queue */
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CsrUint16 fromhost_sigbuf_handle;
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/* Buffer handle of the to-host signal queue */
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CsrUint16 tohost_sigbuf_handle;
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/*
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* Maximum number of signal primitive or bulk data command fragments that may be
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* pending in the to-hw signal queue.
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*/
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CsrUint16 num_fromhost_sig_frags;
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/*
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* Number of signal primitive or bulk data command fragments that must be pending
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* in the to-host signal queue before the host will generate an interrupt
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* to indicate that it has read a signal. This will usually be the total
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* capacity of the to-host signal buffer less the size of the largest signal
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* primitive divided by the signal primitive fragment size, but may be set
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* to 1 to request interrupts every time that the host read a signal.
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* Note that the hw may place more signals in the to-host signal queue
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* than indicated by this field.
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*/
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CsrUint16 num_tohost_sig_frags;
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/*
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* Number of to-hw bulk data slots. Slots are numbered from 0 (zero) to
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* one less than the value in this field
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*/
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CsrUint16 num_fromhost_data_slots;
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/*
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* Number of frm-hw bulk data slots. Slots are numbered from 0 (zero) to
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* one less than the value in this field
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*/
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CsrUint16 num_tohost_data_slots;
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/*
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* Size of the bulk data slots (2 octets)
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* The size of the bulk data slots in octets. This will usually be
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* the size of the largest MSDU. The value should always be even.
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*/
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CsrUint16 data_slot_size;
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/*
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* Indicates that the host has finished the initialisation sequence.
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* Initialised to 0x0000 by the firmware, and set to 0x0001 by us.
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*/
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CsrUint16 initialised;
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/* Added by protocol version 0x0001 */
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CsrUint32 overlay_size;
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/* Added by protocol version 0x0300 */
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CsrUint16 data_slot_round;
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CsrUint16 sig_frag_size;
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/* Added by protocol version 0x0500 */
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CsrUint16 tohost_signal_padding;
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} sdio_config_data_t;
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/*
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* These values may change with versions of the Host Interface Protocol.
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*/
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/*
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* Size of config info block pointed to by the CSR_SLT_SDIO_SLOT_CONFIG
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* entry in the f/w symbol table
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*/
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#define SDIO_CONFIG_DATA_SIZE 30
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/* Offset of the INIT flag in the config info block. */
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#define SDIO_INIT_FLAG_OFFSET 0x12
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#define SDIO_TO_HOST_SIG_PADDING_OFFSET 0x1C
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/* Structure for a bulk data transfer command */
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typedef struct
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{
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CsrUint16 cmd_and_len; /* bits 12-15 cmd, bits 0-11 len */
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CsrUint16 data_slot; /* slot number, perhaps OR'd with SLOT_DIR_TO_HOST */
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CsrUint16 offset;
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CsrUint16 buffer_handle;
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} bulk_data_cmd_t;
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/* Bulk Data signal command values */
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#define SDIO_CMD_SIGNAL 0x00
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#define SDIO_CMD_TO_HOST_TRANSFER 0x01
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#define SDIO_CMD_TO_HOST_TRANSFER_ACK 0x02 /*deprecated*/
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#define SDIO_CMD_FROM_HOST_TRANSFER 0x03
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#define SDIO_CMD_FROM_HOST_TRANSFER_ACK 0x04 /*deprecated*/
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#define SDIO_CMD_CLEAR_SLOT 0x05
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#define SDIO_CMD_OVERLAY_TRANSFER 0x06
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#define SDIO_CMD_OVERLAY_TRANSFER_ACK 0x07 /*deprecated*/
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#define SDIO_CMD_FROM_HOST_AND_CLEAR 0x08
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#define SDIO_CMD_PADDING 0x0f
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#define SLOT_DIR_TO_HOST 0x8000
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/* Initialise bulkdata slot
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* params:
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* bulk_data_desc_t *bulk_data_slot
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*/
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#define UNIFI_INIT_BULK_DATA(bulk_data_slot) \
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{ \
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(bulk_data_slot)->os_data_ptr = NULL; \
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(bulk_data_slot)->data_length = 0; \
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(bulk_data_slot)->os_net_buf_ptr = NULL; \
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(bulk_data_slot)->net_buf_length = 0; \
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}
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/*
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* Structure to contain a SIGNAL datagram.
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* This is used to build signal queues between the main driver and the
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* i/o thread.
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* The fields are:
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* sigbuf Contains the HIP signal is wire-format (i.e. packed,
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* little-endian)
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* bulkdata Contains a copy of any associated bulk data
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* signal_length The size of the signal in the sigbuf
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*/
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typedef struct card_signal
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{
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u8 sigbuf[UNIFI_PACKED_SIGBUF_SIZE];
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/* Length of the SIGNAL inside sigbuf */
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CsrUint16 signal_length;
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bulk_data_desc_t bulkdata[UNIFI_MAX_DATA_REFERENCES];
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} card_signal_t;
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/*
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* Control structure for a generic ring buffer.
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*/
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#define UNIFI_QUEUE_NAME_MAX_LENGTH 16
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typedef struct
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{
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card_signal_t *q_body;
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/* Num elements in queue (capacity is one less than this!) */
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CsrUint16 q_length;
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CsrUint16 q_wr_ptr;
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CsrUint16 q_rd_ptr;
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CsrCharString name[UNIFI_QUEUE_NAME_MAX_LENGTH];
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} q_t;
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#define UNIFI_RESERVED_COMMAND_SLOTS 2
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/* Considering approx 500 us per packet giving 0.5 secs */
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#define UNIFI_PACKETS_INTERVAL 1000
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/*
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* Dynamic slot reservation for QoS
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*/
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typedef struct
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{
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CsrUint16 from_host_used_slots[UNIFI_NO_OF_TX_QS];
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CsrUint16 from_host_max_slots[UNIFI_NO_OF_TX_QS];
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CsrUint16 from_host_reserved_slots[UNIFI_NO_OF_TX_QS];
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/* Parameters to determine if a queue was active.
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If number of packets sent is greater than the threshold
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for the queue, the queue is considered active and no
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re reservation is done, it is important not to keep this
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value too low */
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/* Packets sent during this interval */
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CsrUint16 packets_txed[UNIFI_NO_OF_TX_QS];
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CsrUint16 total_packets_txed;
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/* Number of packets to see if slots need to be reassigned */
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CsrUint16 packets_interval;
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/* Once a queue reaches a stable state, avoid processing */
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CsrBool queue_stable[UNIFI_NO_OF_TX_QS];
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} card_dynamic_slot_t;
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/* These are type-safe and don't write incorrect values to the
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* structure. */
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/* Return queue slots used count
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* params:
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* const q_t *q
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* returns:
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* CsrUint16
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*/
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#define CSR_WIFI_HIP_Q_SLOTS_USED(q) \
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(((q)->q_wr_ptr - (q)->q_rd_ptr < 0)? \
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((q)->q_wr_ptr - (q)->q_rd_ptr + (q)->q_length) : ((q)->q_wr_ptr - (q)->q_rd_ptr))
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/* Return queue slots free count
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* params:
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* const q_t *q
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* returns:
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* CsrUint16
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*/
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#define CSR_WIFI_HIP_Q_SLOTS_FREE(q) \
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((q)->q_length - CSR_WIFI_HIP_Q_SLOTS_USED((q)) - 1)
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/* Return slot signal data pointer
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* params:
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* const q_t *q
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* CsrUint16 slot
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* returns:
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* card_signal_t *
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*/
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#define CSR_WIFI_HIP_Q_SLOT_DATA(q, slot) \
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((q)->q_body + slot)
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/* Return queue next read slot
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* params:
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* const q_t *q
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* returns:
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* CsrUint16 slot offset
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*/
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#define CSR_WIFI_HIP_Q_NEXT_R_SLOT(q) \
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((q)->q_rd_ptr)
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/* Return queue next write slot
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* params:
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* const q_t *q
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* returns:
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* CsrUint16 slot offset
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*/
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#define CSR_WIFI_HIP_Q_NEXT_W_SLOT(q) \
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((q)->q_wr_ptr)
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/* Return updated queue pointer wrapped around its length
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* params:
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* const q_t *q
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* CsrUint16 x amount to add to queue pointer
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* returns:
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* CsrUint16 wrapped queue pointer
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*/
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#define CSR_WIFI_HIP_Q_WRAP(q, x) \
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((((x) >= (q)->q_length)?((x) % (q)->q_length) : (x)))
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/* Advance queue read pointer
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* params:
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* const q_t *q
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*/
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#define CSR_WIFI_HIP_Q_INC_R(q) \
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((q)->q_rd_ptr = CSR_WIFI_HIP_Q_WRAP((q), (q)->q_rd_ptr + 1))
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/* Advance queue write pointer
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* params:
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* const q_t *q
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*/
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#define CSR_WIFI_HIP_Q_INC_W(q) \
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((q)->q_wr_ptr = CSR_WIFI_HIP_Q_WRAP((q), (q)->q_wr_ptr + 1))
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enum unifi_host_state
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{
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UNIFI_HOST_STATE_AWAKE = 0,
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UNIFI_HOST_STATE_DROWSY = 1,
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UNIFI_HOST_STATE_TORPID = 2
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};
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typedef struct
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{
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bulk_data_desc_t bd;
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unifi_TrafficQueue queue; /* Used for dynamic slot reservation */
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} slot_desc_t;
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/*
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* Structure describing a UniFi SDIO card.
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*/
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struct card
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{
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/*
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* Back pointer for the higher level OS code. This is passed as
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* an argument to callbacks (e.g. for received data and indications).
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*/
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void *ospriv;
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/*
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* mapping of HIP slot to MA-PACKET.req host tag, the
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* array is indexed by slot numbers and each index stores
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* information of the last host tag it was used for
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*/
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CsrUint32 *fh_slot_host_tag_record;
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/* Info read from Symbol Table during probe */
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CsrUint32 build_id;
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CsrCharString build_id_string[128];
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/* Retrieve from SDIO driver. */
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CsrUint16 chip_id;
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/* Read from GBL_CHIP_VERSION. */
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CsrUint16 chip_version;
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/* From the SDIO driver (probably 1) */
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u8 function;
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/* This is sused to get the register addresses and things. */
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ChipDescript *helper;
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/*
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* Bit mask of PIOs for the loader to waggle during download.
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* We assume these are connected to LEDs. The main firmware gets
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* the mask from a MIB entry.
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*/
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CsrInt32 loader_led_mask;
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/*
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* Support for flow control. When the from-host queue of signals
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* is full, we ask the host upper layer to stop sending packets. When
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* the queue drains we tell it that it can send packets again.
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* We use this flag to remember the current state.
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*/
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#define card_is_tx_q_paused(card, q) (card->tx_q_paused_flag[q])
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#define card_tx_q_unpause(card, q) (card->tx_q_paused_flag[q] = 0)
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#define card_tx_q_pause(card, q) (card->tx_q_paused_flag[q] = 1)
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CsrUint16 tx_q_paused_flag[UNIFI_TRAFFIC_Q_MAX + 1 + UNIFI_NO_OF_TX_QS]; /* defensive more than big enough */
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/* UDI callback for logging UniFi interactions */
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udi_func_t udi_hook;
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u8 bh_reason_host;
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u8 bh_reason_unifi;
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/* SDIO clock speed request from OS layer */
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u8 request_max_clock;
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/* Last SDIO clock frequency set */
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CsrUint32 sdio_clock_speed;
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/*
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* Current host state (copy of value in IOABORT register and
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* spinlock to protect it.
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*/
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enum unifi_host_state host_state;
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enum unifi_low_power_mode low_power_mode;
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enum unifi_periodic_wake_mode periodic_wake_mode;
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/*
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* Ring buffer of signal structs for a queue of data packets from
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* the host.
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* The queue is empty when fh_data_q_num_rd == fh_data_q_num_wr.
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* To add a packet to the queue, copy it to index given by
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* (fh_data_q_num_wr%UNIFI_SOFT_Q_LENGTH) and advance fh_data_q_num_wr.
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* To take a packet from the queue, copy data from index given by
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* (fh_data_q_num_rd%UNIFI_SOFT_Q_LENGTH) and advance fh_data_q_num_rd.
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* fh_data_q_num_rd and fh_data_q_num_rd are both modulo 256.
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*/
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card_signal_t fh_command_q_body[UNIFI_SOFT_COMMAND_Q_LENGTH];
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q_t fh_command_queue;
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card_signal_t fh_traffic_q_body[UNIFI_NO_OF_TX_QS][UNIFI_SOFT_TRAFFIC_Q_LENGTH];
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q_t fh_traffic_queue[UNIFI_NO_OF_TX_QS];
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/*
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* Signal counts from UniFi SDIO Control Data Structure.
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* These are cached and synchronised with the UniFi before and after
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* a batch of operations.
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*
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* These are the modulo-256 count of signals written to or read from UniFi
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* The value is incremented for every signal.
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*/
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CsrInt32 from_host_signals_w;
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CsrInt32 from_host_signals_r;
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CsrInt32 to_host_signals_r;
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CsrInt32 to_host_signals_w;
|
|
|
|
|
|
/* Should specify buffer size as a number of signals */
|
|
/*
|
|
* Enough for 10 th and 10 fh data slots:
|
|
* 1 * 10 * 8 = 80
|
|
* 2 * 10 * 8 = 160
|
|
*/
|
|
#define UNIFI_FH_BUF_SIZE 1024
|
|
struct sigbuf
|
|
{
|
|
u8 *buf; /* buffer area */
|
|
u8 *ptr; /* current pos */
|
|
CsrUint16 count; /* signal count */
|
|
CsrUint16 bufsize;
|
|
} fh_buffer;
|
|
struct sigbuf th_buffer;
|
|
|
|
|
|
/*
|
|
* Field to use for the incrementing value to write to the UniFi
|
|
* SHARED_IO_INTERRUPT register.
|
|
* Flag to say we need to generate an interrupt at end of processing.
|
|
*/
|
|
CsrUint32 unifi_interrupt_seq;
|
|
u8 generate_interrupt;
|
|
|
|
|
|
/* Pointers to the bulk data slots */
|
|
slot_desc_t *from_host_data;
|
|
bulk_data_desc_t *to_host_data;
|
|
|
|
|
|
/*
|
|
* Index of the next (hopefully) free data slot.
|
|
* This is an optimisation that starts searching at a more likely point
|
|
* than the beginning.
|
|
*/
|
|
CsrInt16 from_host_data_head;
|
|
|
|
/* Dynamic slot allocation for queues */
|
|
card_dynamic_slot_t dynamic_slot_data;
|
|
|
|
/*
|
|
* SDIO specific fields
|
|
*/
|
|
|
|
/* Interface pointer for the SDIO library */
|
|
CsrSdioFunction *sdio_if;
|
|
|
|
/* Copy of config_data struct from the card */
|
|
sdio_config_data_t config_data;
|
|
|
|
/* SDIO address of the Initialised flag and Control Data struct */
|
|
CsrUint32 init_flag_addr;
|
|
CsrUint32 sdio_ctrl_addr;
|
|
|
|
/* The last value written to the Shared Data Memory Page register */
|
|
CsrUint32 proc_select;
|
|
CsrUint32 dmem_page;
|
|
CsrUint32 pmem_page;
|
|
|
|
/* SDIO traffic counters limited to 32 bits for Synergy compatibility */
|
|
CsrUint32 sdio_bytes_read;
|
|
CsrUint32 sdio_bytes_written;
|
|
|
|
u8 memory_resources_allocated;
|
|
|
|
/* UniFi SDIO I/O Block size. */
|
|
CsrUint16 sdio_io_block_size;
|
|
|
|
/* Pad transfer sizes to SDIO block boundaries */
|
|
CsrBool sdio_io_block_pad;
|
|
|
|
/* Read from the XBV */
|
|
struct FWOV fwov;
|
|
|
|
#ifndef CSR_WIFI_HIP_TA_DISABLE
|
|
/* TA sampling */
|
|
ta_data_t ta_sampling;
|
|
#endif
|
|
|
|
/* Auto-coredump */
|
|
CsrInt16 request_coredump_on_reset; /* request coredump on next reset */
|
|
struct coredump_buf *dump_buf; /* root node */
|
|
struct coredump_buf *dump_next_write; /* node to fill at next dump */
|
|
struct coredump_buf *dump_cur_read; /* valid node to read, or NULL */
|
|
|
|
#ifdef CSR_WIFI_HIP_DATA_PLANE_PROFILE
|
|
struct cmd_profile
|
|
{
|
|
CsrUint32 cmd52_count;
|
|
CsrUint32 cmd53_count;
|
|
CsrUint32 tx_count;
|
|
CsrUint32 tx_cfm_count;
|
|
CsrUint32 rx_count;
|
|
CsrUint32 bh_count;
|
|
CsrUint32 process_count;
|
|
CsrUint32 protocol_count;
|
|
|
|
CsrUint32 cmd52_f0_r_count;
|
|
CsrUint32 cmd52_f0_w_count;
|
|
CsrUint32 cmd52_r8or16_count;
|
|
CsrUint32 cmd52_w8or16_count;
|
|
CsrUint32 cmd52_r16_count;
|
|
CsrUint32 cmd52_w16_count;
|
|
CsrUint32 cmd52_r32_count;
|
|
|
|
CsrUint32 sdio_cmd_signal;
|
|
CsrUint32 sdio_cmd_clear_slot;
|
|
CsrUint32 sdio_cmd_to_host;
|
|
CsrUint32 sdio_cmd_from_host;
|
|
CsrUint32 sdio_cmd_from_host_and_clear;
|
|
} hip_prof;
|
|
struct cmd_profile cmd_prof;
|
|
#endif
|
|
|
|
/* Interrupt processing mode flags */
|
|
CsrUint32 intmode;
|
|
|
|
#ifdef UNIFI_DEBUG
|
|
u8 lsb;
|
|
#endif
|
|
|
|
/* Historic firmware panic codes */
|
|
CsrUint32 panic_data_phy_addr;
|
|
CsrUint32 panic_data_mac_addr;
|
|
CsrUint16 last_phy_panic_code;
|
|
CsrUint16 last_phy_panic_arg;
|
|
CsrUint16 last_mac_panic_code;
|
|
CsrUint16 last_mac_panic_arg;
|
|
#ifdef CSR_PRE_ALLOC_NET_DATA
|
|
bulk_data_desc_t bulk_data_desc_list[BULK_DATA_PRE_ALLOC_NUM];
|
|
CsrUint16 prealloc_netdata_r;
|
|
CsrUint16 prealloc_netdata_w;
|
|
#endif
|
|
}; /* struct card */
|
|
|
|
|
|
/* Reset types */
|
|
enum unifi_reset_type
|
|
{
|
|
UNIFI_COLD_RESET = 1,
|
|
UNIFI_WARM_RESET = 2
|
|
};
|
|
|
|
/*
|
|
* unifi_set_host_state() implements signalling for waking UniFi from
|
|
* deep sleep. The host indicates to UniFi that it is in one of three states:
|
|
* Torpid - host has nothing to send, UniFi can go to sleep.
|
|
* Drowsy - host has data to send to UniFi. UniFi will respond with an
|
|
* SDIO interrupt. When hosts responds it moves to Awake.
|
|
* Awake - host has data to transfer, UniFi must stay awake.
|
|
* When host has finished, it moves to Torpid.
|
|
*/
|
|
CsrResult unifi_set_host_state(card_t *card, enum unifi_host_state state);
|
|
|
|
|
|
CsrResult unifi_set_proc_select(card_t *card, enum unifi_dbg_processors_select select);
|
|
CsrInt32 card_read_signal_counts(card_t *card);
|
|
bulk_data_desc_t* card_find_data_slot(card_t *card, CsrInt16 slot);
|
|
|
|
|
|
CsrResult unifi_read32(card_t *card, CsrUint32 unifi_addr, CsrUint32 *pdata);
|
|
CsrResult unifi_readnz(card_t *card, CsrUint32 unifi_addr,
|
|
void *pdata, CsrUint16 len);
|
|
CsrInt32 unifi_read_shared_count(card_t *card, CsrUint32 addr);
|
|
|
|
CsrResult unifi_writen(card_t *card, CsrUint32 unifi_addr, void *pdata, CsrUint16 len);
|
|
|
|
CsrResult unifi_bulk_rw(card_t *card, CsrUint32 handle,
|
|
void *pdata, CsrUint32 len, CsrInt16 direction);
|
|
CsrResult unifi_bulk_rw_noretry(card_t *card, CsrUint32 handle,
|
|
void *pdata, CsrUint32 len, CsrInt16 direction);
|
|
#define UNIFI_SDIO_READ 0
|
|
#define UNIFI_SDIO_WRITE 1
|
|
|
|
CsrResult unifi_read_8_or_16(card_t *card, CsrUint32 unifi_addr, u8 *pdata);
|
|
CsrResult unifi_write_8_or_16(card_t *card, CsrUint32 unifi_addr, u8 data);
|
|
CsrResult unifi_read_direct_8_or_16(card_t *card, CsrUint32 addr, u8 *pdata);
|
|
CsrResult unifi_write_direct_8_or_16(card_t *card, CsrUint32 addr, u8 data);
|
|
|
|
CsrResult unifi_read_direct16(card_t *card, CsrUint32 addr, CsrUint16 *pdata);
|
|
CsrResult unifi_read_direct32(card_t *card, CsrUint32 addr, CsrUint32 *pdata);
|
|
CsrResult unifi_read_directn(card_t *card, CsrUint32 addr, void *pdata, CsrUint16 len);
|
|
|
|
CsrResult unifi_write_direct16(card_t *card, CsrUint32 addr, CsrUint16 data);
|
|
CsrResult unifi_write_directn(card_t *card, CsrUint32 addr, void *pdata, CsrUint16 len);
|
|
|
|
CsrResult sdio_read_f0(card_t *card, CsrUint32 addr, u8 *pdata);
|
|
CsrResult sdio_write_f0(card_t *card, CsrUint32 addr, u8 data);
|
|
|
|
void unifi_read_panic(card_t *card);
|
|
#ifdef CSR_PRE_ALLOC_NET_DATA
|
|
void prealloc_netdata_free(card_t *card);
|
|
CsrResult prealloc_netdata_alloc(card_t *card);
|
|
#endif
|
|
/* For diagnostic use */
|
|
void dump(void *mem, CsrUint16 len);
|
|
void dump16(void *mem, CsrUint16 len);
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* __CARD_SDIO_H__ */
|