54e269ead6
Patch from Deepak Saxena The expansion bus on the IXP46x NPU can be configured for either 32MiB or 16MiB windows and changing the configuration causes the base address for each chip select for each region to change. Because of this, we cannot hardcode the physical base as we currently do. This patch checks the expansion bus configuration registers at runtime to determine the appropriate window size. Note that this requires that the bootloader already configured the device sizes appropriately, but I feel that is valid assumption to make as the bootloader must configure and access the flash window, the output display (LCD, LEDs, etc) window, and other expansion bus devices. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
35 lines
823 B
C
35 lines
823 B
C
/*
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* include/asm-arm/arch-ixp4xx/ixdp425.h
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*
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* IXDP425 platform specific definitions
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*
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* Author: Deepak Saxena <dsaxena@plexity.net>
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*
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* Copyright 2004 (c) MontaVista, Software, Inc.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H__
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#error "Do not include this directly, instead #include <asm/hardware.h>"
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#endif
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#define IXDP425_SDA_PIN 7
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#define IXDP425_SCL_PIN 6
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/*
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* IXDP425 PCI IRQs
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*/
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#define IXDP425_PCI_MAX_DEV 4
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#define IXDP425_PCI_IRQ_LINES 4
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/* PCI controller GPIO to IRQ pin mappings */
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#define IXDP425_PCI_INTA_PIN 11
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#define IXDP425_PCI_INTB_PIN 10
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#define IXDP425_PCI_INTC_PIN 9
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#define IXDP425_PCI_INTD_PIN 8
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