229d3534f5
These formats(NV12M, NV12MT and YUV420M) have non contiguous multi planes, so each plane uses different buffer. The exynos drm should support multi buffer for them. Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
434 lines
12 KiB
C
434 lines
12 KiB
C
/* exynos_drm_crtc.c
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* Authors:
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* Inki Dae <inki.dae@samsung.com>
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* Joonyoung Shim <jy0922.shim@samsung.com>
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* Seung-Woo Kim <sw0312.kim@samsung.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "drmP.h"
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#include "drm_crtc_helper.h"
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#include "exynos_drm_crtc.h"
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#include "exynos_drm_drv.h"
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#include "exynos_drm_fb.h"
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#include "exynos_drm_encoder.h"
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#include "exynos_drm_gem.h"
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#define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc,\
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drm_crtc)
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/*
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* Exynos specific crtc structure.
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*
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* @drm_crtc: crtc object.
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* @overlay: contain information common to display controller and hdmi and
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* contents of this overlay object would be copied to sub driver size.
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* @pipe: a crtc index created at load() with a new crtc object creation
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* and the crtc object would be set to private->crtc array
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* to get a crtc object corresponding to this pipe from private->crtc
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* array when irq interrupt occured. the reason of using this pipe is that
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* drm framework doesn't support multiple irq yet.
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* we can refer to the crtc to current hardware interrupt occured through
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* this pipe value.
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* @dpms: store the crtc dpms value
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*/
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struct exynos_drm_crtc {
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struct drm_crtc drm_crtc;
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struct exynos_drm_overlay overlay;
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unsigned int pipe;
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unsigned int dpms;
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};
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static void exynos_drm_crtc_apply(struct drm_crtc *crtc)
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{
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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struct exynos_drm_overlay *overlay = &exynos_crtc->overlay;
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exynos_drm_fn_encoder(crtc, overlay,
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exynos_drm_encoder_crtc_mode_set);
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exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
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exynos_drm_encoder_crtc_commit);
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}
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int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay,
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struct drm_framebuffer *fb,
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struct drm_display_mode *mode,
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struct exynos_drm_crtc_pos *pos)
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{
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struct exynos_drm_gem_buf *buffer;
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unsigned int actual_w;
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unsigned int actual_h;
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int nr = exynos_drm_format_num_buffers(fb->pixel_format);
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int i;
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for (i = 0; i < nr; i++) {
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buffer = exynos_drm_fb_buffer(fb, i);
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if (!buffer) {
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DRM_LOG_KMS("buffer is null\n");
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return -EFAULT;
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}
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overlay->dma_addr[i] = buffer->dma_addr;
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overlay->vaddr[i] = buffer->kvaddr;
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DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n",
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i, (unsigned long)overlay->vaddr[i],
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(unsigned long)overlay->dma_addr[i]);
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}
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actual_w = min((mode->hdisplay - pos->crtc_x), pos->crtc_w);
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actual_h = min((mode->vdisplay - pos->crtc_y), pos->crtc_h);
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/* set drm framebuffer data. */
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overlay->fb_x = pos->fb_x;
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overlay->fb_y = pos->fb_y;
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overlay->fb_width = fb->width;
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overlay->fb_height = fb->height;
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overlay->bpp = fb->bits_per_pixel;
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overlay->pitch = fb->pitches[0];
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overlay->pixel_format = fb->pixel_format;
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/* set overlay range to be displayed. */
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overlay->crtc_x = pos->crtc_x;
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overlay->crtc_y = pos->crtc_y;
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overlay->crtc_width = actual_w;
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overlay->crtc_height = actual_h;
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/* set drm mode data. */
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overlay->mode_width = mode->hdisplay;
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overlay->mode_height = mode->vdisplay;
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overlay->refresh = mode->vrefresh;
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overlay->scan_flag = mode->flags;
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DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
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overlay->crtc_x, overlay->crtc_y,
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overlay->crtc_width, overlay->crtc_height);
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return 0;
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}
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static int exynos_drm_crtc_update(struct drm_crtc *crtc)
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{
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struct exynos_drm_crtc *exynos_crtc;
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struct exynos_drm_overlay *overlay;
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struct exynos_drm_crtc_pos pos;
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struct drm_display_mode *mode = &crtc->mode;
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struct drm_framebuffer *fb = crtc->fb;
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if (!mode || !fb)
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return -EINVAL;
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exynos_crtc = to_exynos_crtc(crtc);
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overlay = &exynos_crtc->overlay;
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memset(&pos, 0, sizeof(struct exynos_drm_crtc_pos));
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/* it means the offset of framebuffer to be displayed. */
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pos.fb_x = crtc->x;
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pos.fb_y = crtc->y;
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/* OSD position to be displayed. */
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pos.crtc_x = 0;
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pos.crtc_y = 0;
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pos.crtc_w = fb->width - crtc->x;
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pos.crtc_h = fb->height - crtc->y;
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return exynos_drm_overlay_update(overlay, crtc->fb, mode, &pos);
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}
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static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
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{
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struct drm_device *dev = crtc->dev;
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode);
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if (exynos_crtc->dpms == mode) {
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DRM_DEBUG_KMS("desired dpms mode is same as previous one.\n");
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return;
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}
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mutex_lock(&dev->struct_mutex);
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switch (mode) {
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case DRM_MODE_DPMS_ON:
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exynos_drm_fn_encoder(crtc, &mode,
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exynos_drm_encoder_crtc_dpms);
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exynos_crtc->dpms = mode;
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break;
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case DRM_MODE_DPMS_STANDBY:
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case DRM_MODE_DPMS_SUSPEND:
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case DRM_MODE_DPMS_OFF:
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exynos_drm_fn_encoder(crtc, &mode,
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exynos_drm_encoder_crtc_dpms);
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exynos_crtc->dpms = mode;
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break;
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default:
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DRM_ERROR("unspecified mode %d\n", mode);
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break;
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}
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mutex_unlock(&dev->struct_mutex);
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}
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static void exynos_drm_crtc_prepare(struct drm_crtc *crtc)
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{
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DRM_DEBUG_KMS("%s\n", __FILE__);
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/* drm framework doesn't check NULL. */
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}
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static void exynos_drm_crtc_commit(struct drm_crtc *crtc)
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{
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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DRM_DEBUG_KMS("%s\n", __FILE__);
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/*
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* when set_crtc is requested from user or at booting time,
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* crtc->commit would be called without dpms call so if dpms is
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* no power on then crtc->dpms should be called
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* with DRM_MODE_DPMS_ON for the hardware power to be on.
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*/
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if (exynos_crtc->dpms != DRM_MODE_DPMS_ON) {
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int mode = DRM_MODE_DPMS_ON;
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/*
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* enable hardware(power on) to all encoders hdmi connected
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* to current crtc.
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*/
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exynos_drm_crtc_dpms(crtc, mode);
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/*
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* enable dma to all encoders connected to current crtc and
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* lcd panel.
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*/
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exynos_drm_fn_encoder(crtc, &mode,
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exynos_drm_encoder_dpms_from_crtc);
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}
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exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
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exynos_drm_encoder_crtc_commit);
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}
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static bool
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exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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DRM_DEBUG_KMS("%s\n", __FILE__);
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/* drm framework doesn't check NULL */
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return true;
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}
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static int
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exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode, int x, int y,
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struct drm_framebuffer *old_fb)
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{
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DRM_DEBUG_KMS("%s\n", __FILE__);
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mode = adjusted_mode;
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return exynos_drm_crtc_update(crtc);
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}
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static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
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struct drm_framebuffer *old_fb)
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{
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int ret;
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DRM_DEBUG_KMS("%s\n", __FILE__);
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ret = exynos_drm_crtc_update(crtc);
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if (ret)
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return ret;
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exynos_drm_crtc_apply(crtc);
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return ret;
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}
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static void exynos_drm_crtc_load_lut(struct drm_crtc *crtc)
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{
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DRM_DEBUG_KMS("%s\n", __FILE__);
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/* drm framework doesn't check NULL */
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}
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static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
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.dpms = exynos_drm_crtc_dpms,
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.prepare = exynos_drm_crtc_prepare,
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.commit = exynos_drm_crtc_commit,
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.mode_fixup = exynos_drm_crtc_mode_fixup,
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.mode_set = exynos_drm_crtc_mode_set,
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.mode_set_base = exynos_drm_crtc_mode_set_base,
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.load_lut = exynos_drm_crtc_load_lut,
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};
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static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event)
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{
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struct drm_device *dev = crtc->dev;
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struct exynos_drm_private *dev_priv = dev->dev_private;
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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struct drm_framebuffer *old_fb = crtc->fb;
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int ret = -EINVAL;
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DRM_DEBUG_KMS("%s\n", __FILE__);
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mutex_lock(&dev->struct_mutex);
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if (event) {
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/*
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* the pipe from user always is 0 so we can set pipe number
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* of current owner to event.
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*/
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event->pipe = exynos_crtc->pipe;
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list_add_tail(&event->base.link,
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&dev_priv->pageflip_event_list);
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ret = drm_vblank_get(dev, exynos_crtc->pipe);
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if (ret) {
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DRM_DEBUG("failed to acquire vblank counter\n");
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list_del(&event->base.link);
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goto out;
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}
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crtc->fb = fb;
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ret = exynos_drm_crtc_update(crtc);
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if (ret) {
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crtc->fb = old_fb;
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drm_vblank_put(dev, exynos_crtc->pipe);
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list_del(&event->base.link);
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goto out;
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}
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/*
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* the values related to a buffer of the drm framebuffer
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* to be applied should be set at here. because these values
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* first, are set to shadow registers and then to
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* real registers at vsync front porch period.
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*/
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exynos_drm_crtc_apply(crtc);
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}
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out:
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mutex_unlock(&dev->struct_mutex);
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return ret;
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}
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static void exynos_drm_crtc_destroy(struct drm_crtc *crtc)
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{
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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struct exynos_drm_private *private = crtc->dev->dev_private;
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DRM_DEBUG_KMS("%s\n", __FILE__);
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private->crtc[exynos_crtc->pipe] = NULL;
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drm_crtc_cleanup(crtc);
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kfree(exynos_crtc);
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}
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static struct drm_crtc_funcs exynos_crtc_funcs = {
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.set_config = drm_crtc_helper_set_config,
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.page_flip = exynos_drm_crtc_page_flip,
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.destroy = exynos_drm_crtc_destroy,
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};
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struct exynos_drm_overlay *get_exynos_drm_overlay(struct drm_device *dev,
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struct drm_crtc *crtc)
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{
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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return &exynos_crtc->overlay;
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}
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int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr)
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{
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struct exynos_drm_crtc *exynos_crtc;
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struct exynos_drm_private *private = dev->dev_private;
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struct drm_crtc *crtc;
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DRM_DEBUG_KMS("%s\n", __FILE__);
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exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL);
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if (!exynos_crtc) {
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DRM_ERROR("failed to allocate exynos crtc\n");
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return -ENOMEM;
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}
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exynos_crtc->pipe = nr;
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exynos_crtc->dpms = DRM_MODE_DPMS_OFF;
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exynos_crtc->overlay.zpos = DEFAULT_ZPOS;
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crtc = &exynos_crtc->drm_crtc;
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private->crtc[nr] = crtc;
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drm_crtc_init(dev, crtc, &exynos_crtc_funcs);
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drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);
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return 0;
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}
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int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int crtc)
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{
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struct exynos_drm_private *private = dev->dev_private;
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struct exynos_drm_crtc *exynos_crtc =
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to_exynos_crtc(private->crtc[crtc]);
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DRM_DEBUG_KMS("%s\n", __FILE__);
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if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
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return -EPERM;
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exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
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exynos_drm_enable_vblank);
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return 0;
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}
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void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc)
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{
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struct exynos_drm_private *private = dev->dev_private;
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struct exynos_drm_crtc *exynos_crtc =
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to_exynos_crtc(private->crtc[crtc]);
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DRM_DEBUG_KMS("%s\n", __FILE__);
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if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
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return;
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exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
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exynos_drm_disable_vblank);
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}
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MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
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MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
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MODULE_AUTHOR("Seung-Woo Kim <sw0312.kim@samsung.com>");
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MODULE_DESCRIPTION("Samsung SoC DRM CRTC Driver");
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MODULE_LICENSE("GPL");
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