0d2fe94647
The ColdFire UART is common to all ColdFire CPU's. No need to duplicate its platform setup code for every CPU family member. Merge all the setup code into a single shared file. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
105 lines
2.9 KiB
C
105 lines
2.9 KiB
C
/***************************************************************************/
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/*
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* linux/arch/m68knommu/platform/54xx/config.c
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*
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* Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/mm.h>
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#include <linux/bootmem.h>
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#include <asm/pgalloc.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/m54xxsim.h>
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#include <asm/mcfuart.h>
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#include <asm/m54xxgpt.h>
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#ifdef CONFIG_MMU
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#include <asm/mmu_context.h>
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#endif
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/***************************************************************************/
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static void __init m54xx_uarts_init(void)
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{
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/* enable io pins */
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__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD,
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MCF_MBAR + MCF_PAR_PSC(0));
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__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS,
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MCF_MBAR + MCF_PAR_PSC(1));
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__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS |
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MCF_PAR_PSC_CTS_CTS, MCF_MBAR + MCF_PAR_PSC(2));
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__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD,
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MCF_MBAR + MCF_PAR_PSC(3));
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}
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/***************************************************************************/
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static void mcf54xx_reset(void)
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{
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/* disable interrupts and enable the watchdog */
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asm("movew #0x2700, %sr\n");
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__raw_writel(0, MCF_MBAR + MCF_GPT_GMS0);
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__raw_writel(MCF_GPT_GCIR_CNT(1), MCF_MBAR + MCF_GPT_GCIR0);
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__raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4),
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MCF_MBAR + MCF_GPT_GMS0);
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}
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/***************************************************************************/
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#ifdef CONFIG_MMU
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unsigned long num_pages;
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static void __init mcf54xx_bootmem_alloc(void)
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{
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unsigned long start_pfn;
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unsigned long memstart;
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/* _rambase and _ramend will be naturally page aligned */
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m68k_memory[0].addr = _rambase;
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m68k_memory[0].size = _ramend - _rambase;
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/* compute total pages in system */
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num_pages = (_ramend - _rambase) >> PAGE_SHIFT;
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/* page numbers */
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memstart = PAGE_ALIGN(_ramstart);
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min_low_pfn = _rambase >> PAGE_SHIFT;
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start_pfn = memstart >> PAGE_SHIFT;
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max_low_pfn = _ramend >> PAGE_SHIFT;
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high_memory = (void *)_ramend;
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m68k_virt_to_node_shift = fls(_ramend - _rambase - 1) - 6;
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module_fixup(NULL, __start_fixup, __stop_fixup);
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/* setup bootmem data */
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m68k_setup_node(0);
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memstart += init_bootmem_node(NODE_DATA(0), start_pfn,
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min_low_pfn, max_low_pfn);
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free_bootmem_node(NODE_DATA(0), memstart, _ramend - memstart);
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}
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#endif /* CONFIG_MMU */
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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#ifdef CONFIG_MMU
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mcf54xx_bootmem_alloc();
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mmu_context_init();
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#endif
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mach_reset = mcf54xx_reset;
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mach_sched_init = hw_timer_init;
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m54xx_uarts_init();
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}
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/***************************************************************************/
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