982 lines
24 KiB
C
982 lines
24 KiB
C
/*
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* linux/drivers/char/at91_serial.c
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*
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* Driver for Atmel AT91RM9200 Serial ports
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* Copyright (C) 2003 Rick Bronson
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*
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* Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/module.h>
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#include <linux/tty.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/serial.h>
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#include <linux/clk.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/tty_flip.h>
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#include <linux/platform_device.h>
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#include <asm/io.h>
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#include <asm/arch/at91rm9200_pdc.h>
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#include <asm/mach/serial_at91.h>
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#include <asm/arch/board.h>
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#include <asm/arch/system.h>
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#include <asm/arch/gpio.h>
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#include "atmel_serial.h"
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#if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/serial_core.h>
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#ifdef CONFIG_SERIAL_ATMEL_TTYAT
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/* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
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* should coexist with the 8250 driver, such as if we have an external 16C550
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* UART. */
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#define SERIAL_AT91_MAJOR 204
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#define MINOR_START 154
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#define AT91_DEVICENAME "ttyAT"
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#else
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/* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
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* name, but it is legally reserved for the 8250 driver. */
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#define SERIAL_AT91_MAJOR TTY_MAJOR
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#define MINOR_START 64
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#define AT91_DEVICENAME "ttyS"
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#endif
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#define AT91_ISR_PASS_LIMIT 256
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#define UART_PUT_CR(port,v) writel(v, (port)->membase + AT91_US_CR)
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#define UART_GET_MR(port) readl((port)->membase + AT91_US_MR)
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#define UART_PUT_MR(port,v) writel(v, (port)->membase + AT91_US_MR)
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#define UART_PUT_IER(port,v) writel(v, (port)->membase + AT91_US_IER)
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#define UART_PUT_IDR(port,v) writel(v, (port)->membase + AT91_US_IDR)
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#define UART_GET_IMR(port) readl((port)->membase + AT91_US_IMR)
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#define UART_GET_CSR(port) readl((port)->membase + AT91_US_CSR)
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#define UART_GET_CHAR(port) readl((port)->membase + AT91_US_RHR)
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#define UART_PUT_CHAR(port,v) writel(v, (port)->membase + AT91_US_THR)
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#define UART_GET_BRGR(port) readl((port)->membase + AT91_US_BRGR)
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#define UART_PUT_BRGR(port,v) writel(v, (port)->membase + AT91_US_BRGR)
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#define UART_PUT_RTOR(port,v) writel(v, (port)->membase + AT91_US_RTOR)
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// #define UART_GET_CR(port) readl((port)->membase + AT91_US_CR) // is write-only
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/* PDC registers */
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#define UART_PUT_PTCR(port,v) writel(v, (port)->membase + AT91_PDC_PTCR)
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#define UART_GET_PTSR(port) readl((port)->membase + AT91_PDC_PTSR)
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#define UART_PUT_RPR(port,v) writel(v, (port)->membase + AT91_PDC_RPR)
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#define UART_GET_RPR(port) readl((port)->membase + AT91_PDC_RPR)
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#define UART_PUT_RCR(port,v) writel(v, (port)->membase + AT91_PDC_RCR)
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#define UART_PUT_RNPR(port,v) writel(v, (port)->membase + AT91_PDC_RNPR)
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#define UART_PUT_RNCR(port,v) writel(v, (port)->membase + AT91_PDC_RNCR)
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#define UART_PUT_TPR(port,v) writel(v, (port)->membase + AT91_PDC_TPR)
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#define UART_PUT_TCR(port,v) writel(v, (port)->membase + AT91_PDC_TCR)
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//#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + AT91_PDC_TNPR)
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//#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + AT91_PDC_TNCR)
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static int (*at91_open)(struct uart_port *);
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static void (*at91_close)(struct uart_port *);
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/*
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* We wrap our port structure around the generic uart_port.
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*/
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struct at91_uart_port {
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struct uart_port uart; /* uart */
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struct clk *clk; /* uart clock */
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unsigned short suspended; /* is port suspended? */
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};
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static struct at91_uart_port at91_ports[ATMEL_MAX_UART];
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#ifdef SUPPORT_SYSRQ
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static struct console at91_console;
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#endif
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/*
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* Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
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*/
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static u_int at91_tx_empty(struct uart_port *port)
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{
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return (UART_GET_CSR(port) & AT91_US_TXEMPTY) ? TIOCSER_TEMT : 0;
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}
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/*
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* Set state of the modem control output lines
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*/
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static void at91_set_mctrl(struct uart_port *port, u_int mctrl)
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{
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unsigned int control = 0;
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unsigned int mode;
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if (arch_identify() == ARCH_ID_AT91RM9200) {
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/*
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* AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
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* We need to drive the pin manually.
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*/
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if (port->mapbase == AT91RM9200_BASE_US0) {
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if (mctrl & TIOCM_RTS)
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at91_set_gpio_value(AT91_PIN_PA21, 0);
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else
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at91_set_gpio_value(AT91_PIN_PA21, 1);
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}
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}
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if (mctrl & TIOCM_RTS)
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control |= AT91_US_RTSEN;
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else
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control |= AT91_US_RTSDIS;
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if (mctrl & TIOCM_DTR)
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control |= AT91_US_DTREN;
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else
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control |= AT91_US_DTRDIS;
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UART_PUT_CR(port, control);
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/* Local loopback mode? */
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mode = UART_GET_MR(port) & ~AT91_US_CHMODE;
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if (mctrl & TIOCM_LOOP)
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mode |= AT91_US_CHMODE_LOC_LOOP;
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else
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mode |= AT91_US_CHMODE_NORMAL;
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UART_PUT_MR(port, mode);
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}
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/*
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* Get state of the modem control input lines
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*/
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static u_int at91_get_mctrl(struct uart_port *port)
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{
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unsigned int status, ret = 0;
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status = UART_GET_CSR(port);
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/*
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* The control signals are active low.
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*/
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if (!(status & AT91_US_DCD))
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ret |= TIOCM_CD;
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if (!(status & AT91_US_CTS))
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ret |= TIOCM_CTS;
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if (!(status & AT91_US_DSR))
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ret |= TIOCM_DSR;
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if (!(status & AT91_US_RI))
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ret |= TIOCM_RI;
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return ret;
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}
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/*
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* Stop transmitting.
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*/
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static void at91_stop_tx(struct uart_port *port)
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{
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struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
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UART_PUT_IDR(port, AT91_US_TXRDY);
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}
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/*
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* Start transmitting.
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*/
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static void at91_start_tx(struct uart_port *port)
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{
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struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
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UART_PUT_IER(port, AT91_US_TXRDY);
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}
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/*
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* Stop receiving - port is in process of being closed.
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*/
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static void at91_stop_rx(struct uart_port *port)
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{
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struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
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UART_PUT_IDR(port, AT91_US_RXRDY);
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}
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/*
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* Enable modem status interrupts
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*/
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static void at91_enable_ms(struct uart_port *port)
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{
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UART_PUT_IER(port, AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC);
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}
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/*
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* Control the transmission of a break signal
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*/
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static void at91_break_ctl(struct uart_port *port, int break_state)
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{
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if (break_state != 0)
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UART_PUT_CR(port, AT91_US_STTBRK); /* start break */
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else
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UART_PUT_CR(port, AT91_US_STPBRK); /* stop break */
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}
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/*
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* Characters received (called from interrupt handler)
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*/
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static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs)
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{
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struct tty_struct *tty = port->info->tty;
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unsigned int status, ch, flg;
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status = UART_GET_CSR(port);
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while (status & AT91_US_RXRDY) {
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ch = UART_GET_CHAR(port);
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port->icount.rx++;
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flg = TTY_NORMAL;
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/*
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* note that the error handling code is
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* out of the main execution path
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*/
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if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE | AT91_US_RXBRK))) {
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UART_PUT_CR(port, AT91_US_RSTSTA); /* clear error */
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if (status & AT91_US_RXBRK) {
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status &= ~(AT91_US_PARE | AT91_US_FRAME); /* ignore side-effect */
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port->icount.brk++;
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if (uart_handle_break(port))
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goto ignore_char;
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}
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if (status & AT91_US_PARE)
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port->icount.parity++;
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if (status & AT91_US_FRAME)
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port->icount.frame++;
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if (status & AT91_US_OVRE)
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port->icount.overrun++;
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status &= port->read_status_mask;
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if (status & AT91_US_RXBRK)
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flg = TTY_BREAK;
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else if (status & AT91_US_PARE)
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flg = TTY_PARITY;
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else if (status & AT91_US_FRAME)
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flg = TTY_FRAME;
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}
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if (uart_handle_sysrq_char(port, ch, regs))
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goto ignore_char;
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uart_insert_char(port, status, AT91_US_OVRE, ch, flg);
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ignore_char:
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status = UART_GET_CSR(port);
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}
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tty_flip_buffer_push(tty);
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}
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/*
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* Transmit characters (called from interrupt handler)
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*/
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static void at91_tx_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->info->xmit;
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if (port->x_char) {
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UART_PUT_CHAR(port, port->x_char);
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port->icount.tx++;
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port->x_char = 0;
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return;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
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at91_stop_tx(port);
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return;
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}
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while (UART_GET_CSR(port) & AT91_US_TXRDY) {
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UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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at91_stop_tx(port);
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}
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/*
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* Interrupt handler
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*/
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static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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struct uart_port *port = dev_id;
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struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
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unsigned int status, pending, pass_counter = 0;
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status = UART_GET_CSR(port);
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pending = status & UART_GET_IMR(port);
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while (pending) {
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/* Interrupt receive */
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if (pending & AT91_US_RXRDY)
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at91_rx_chars(port, regs);
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// TODO: All reads to CSR will clear these interrupts!
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if (pending & AT91_US_RIIC) port->icount.rng++;
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if (pending & AT91_US_DSRIC) port->icount.dsr++;
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if (pending & AT91_US_DCDIC)
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uart_handle_dcd_change(port, !(status & AT91_US_DCD));
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if (pending & AT91_US_CTSIC)
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uart_handle_cts_change(port, !(status & AT91_US_CTS));
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if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC))
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wake_up_interruptible(&port->info->delta_msr_wait);
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/* Interrupt transmit */
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if (pending & AT91_US_TXRDY)
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at91_tx_chars(port);
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if (pass_counter++ > AT91_ISR_PASS_LIMIT)
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break;
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status = UART_GET_CSR(port);
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pending = status & UART_GET_IMR(port);
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}
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return IRQ_HANDLED;
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}
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/*
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* Perform initialization and enable port for reception
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*/
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static int at91_startup(struct uart_port *port)
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{
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struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
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int retval;
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/*
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* Ensure that no interrupts are enabled otherwise when
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* request_irq() is called we could get stuck trying to
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* handle an unexpected interrupt
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*/
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UART_PUT_IDR(port, -1);
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/*
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* Allocate the IRQ
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*/
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retval = request_irq(port->irq, at91_interrupt, IRQF_SHARED, "at91_serial", port);
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if (retval) {
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printk("at91_serial: at91_startup - Can't get irq\n");
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return retval;
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}
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/*
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* If there is a specific "open" function (to register
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* control line interrupts)
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*/
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if (at91_open) {
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retval = at91_open(port);
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if (retval) {
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free_irq(port->irq, port);
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return retval;
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}
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}
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/*
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* Finally, enable the serial port
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*/
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UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
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UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); /* enable xmit & rcvr */
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UART_PUT_IER(port, AT91_US_RXRDY); /* enable receive only */
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return 0;
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}
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/*
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* Disable the port
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*/
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static void at91_shutdown(struct uart_port *port)
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{
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struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
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/*
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* Disable all interrupts, port and break condition.
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*/
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UART_PUT_CR(port, AT91_US_RSTSTA);
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UART_PUT_IDR(port, -1);
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/*
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* Free the interrupt
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*/
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free_irq(port->irq, port);
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/*
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* If there is a specific "close" function (to unregister
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* control line interrupts)
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*/
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if (at91_close)
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at91_close(port);
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}
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/*
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* Power / Clock management.
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*/
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static void at91_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
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{
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struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
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switch (state) {
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case 0:
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/*
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* Enable the peripheral clock for this serial port.
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* This is called on uart_open() or a resume event.
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*/
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clk_enable(at91_port->clk);
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break;
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case 3:
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/*
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* Disable the peripheral clock for this serial port.
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* This is called on uart_close() or a suspend event.
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*/
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clk_disable(at91_port->clk);
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break;
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default:
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printk(KERN_ERR "at91_serial: unknown pm %d\n", state);
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}
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}
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|
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/*
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* Change the port parameters
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*/
|
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static void at91_set_termios(struct uart_port *port, struct termios * termios, struct termios * old)
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{
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unsigned long flags;
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unsigned int mode, imr, quot, baud;
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
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quot = uart_get_divisor(port, baud);
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|
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/* Get current mode register */
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mode = UART_GET_MR(port) & ~(AT91_US_CHRL | AT91_US_NBSTOP | AT91_US_PAR);
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|
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/* byte size */
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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|
mode |= AT91_US_CHRL_5;
|
|
break;
|
|
case CS6:
|
|
mode |= AT91_US_CHRL_6;
|
|
break;
|
|
case CS7:
|
|
mode |= AT91_US_CHRL_7;
|
|
break;
|
|
default:
|
|
mode |= AT91_US_CHRL_8;
|
|
break;
|
|
}
|
|
|
|
/* stop bits */
|
|
if (termios->c_cflag & CSTOPB)
|
|
mode |= AT91_US_NBSTOP_2;
|
|
|
|
/* parity */
|
|
if (termios->c_cflag & PARENB) {
|
|
if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
|
|
if (termios->c_cflag & PARODD)
|
|
mode |= AT91_US_PAR_MARK;
|
|
else
|
|
mode |= AT91_US_PAR_SPACE;
|
|
}
|
|
else if (termios->c_cflag & PARODD)
|
|
mode |= AT91_US_PAR_ODD;
|
|
else
|
|
mode |= AT91_US_PAR_EVEN;
|
|
}
|
|
else
|
|
mode |= AT91_US_PAR_NONE;
|
|
|
|
spin_lock_irqsave(&port->lock, flags);
|
|
|
|
port->read_status_mask = AT91_US_OVRE;
|
|
if (termios->c_iflag & INPCK)
|
|
port->read_status_mask |= (AT91_US_FRAME | AT91_US_PARE);
|
|
if (termios->c_iflag & (BRKINT | PARMRK))
|
|
port->read_status_mask |= AT91_US_RXBRK;
|
|
|
|
/*
|
|
* Characters to ignore
|
|
*/
|
|
port->ignore_status_mask = 0;
|
|
if (termios->c_iflag & IGNPAR)
|
|
port->ignore_status_mask |= (AT91_US_FRAME | AT91_US_PARE);
|
|
if (termios->c_iflag & IGNBRK) {
|
|
port->ignore_status_mask |= AT91_US_RXBRK;
|
|
/*
|
|
* If we're ignoring parity and break indicators,
|
|
* ignore overruns too (for real raw support).
|
|
*/
|
|
if (termios->c_iflag & IGNPAR)
|
|
port->ignore_status_mask |= AT91_US_OVRE;
|
|
}
|
|
|
|
// TODO: Ignore all characters if CREAD is set.
|
|
|
|
/* update the per-port timeout */
|
|
uart_update_timeout(port, termios->c_cflag, baud);
|
|
|
|
/* disable interrupts and drain transmitter */
|
|
imr = UART_GET_IMR(port); /* get interrupt mask */
|
|
UART_PUT_IDR(port, -1); /* disable all interrupts */
|
|
while (!(UART_GET_CSR(port) & AT91_US_TXEMPTY)) { barrier(); }
|
|
|
|
/* disable receiver and transmitter */
|
|
UART_PUT_CR(port, AT91_US_TXDIS | AT91_US_RXDIS);
|
|
|
|
/* set the parity, stop bits and data size */
|
|
UART_PUT_MR(port, mode);
|
|
|
|
/* set the baud rate */
|
|
UART_PUT_BRGR(port, quot);
|
|
UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
|
|
UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
|
|
|
|
/* restore interrupts */
|
|
UART_PUT_IER(port, imr);
|
|
|
|
/* CTS flow-control and modem-status interrupts */
|
|
if (UART_ENABLE_MS(port, termios->c_cflag))
|
|
port->ops->enable_ms(port);
|
|
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
}
|
|
|
|
/*
|
|
* Return string describing the specified port
|
|
*/
|
|
static const char *at91_type(struct uart_port *port)
|
|
{
|
|
return (port->type == PORT_AT91) ? "AT91_SERIAL" : NULL;
|
|
}
|
|
|
|
/*
|
|
* Release the memory region(s) being used by 'port'.
|
|
*/
|
|
static void at91_release_port(struct uart_port *port)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(port->dev);
|
|
int size = pdev->resource[0].end - pdev->resource[0].start + 1;
|
|
|
|
release_mem_region(port->mapbase, size);
|
|
|
|
if (port->flags & UPF_IOREMAP) {
|
|
iounmap(port->membase);
|
|
port->membase = NULL;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Request the memory region(s) being used by 'port'.
|
|
*/
|
|
static int at91_request_port(struct uart_port *port)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(port->dev);
|
|
int size = pdev->resource[0].end - pdev->resource[0].start + 1;
|
|
|
|
if (!request_mem_region(port->mapbase, size, "at91_serial"))
|
|
return -EBUSY;
|
|
|
|
if (port->flags & UPF_IOREMAP) {
|
|
port->membase = ioremap(port->mapbase, size);
|
|
if (port->membase == NULL) {
|
|
release_mem_region(port->mapbase, size);
|
|
return -ENOMEM;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Configure/autoconfigure the port.
|
|
*/
|
|
static void at91_config_port(struct uart_port *port, int flags)
|
|
{
|
|
if (flags & UART_CONFIG_TYPE) {
|
|
port->type = PORT_AT91;
|
|
at91_request_port(port);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Verify the new serial_struct (for TIOCSSERIAL).
|
|
*/
|
|
static int at91_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
int ret = 0;
|
|
if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91)
|
|
ret = -EINVAL;
|
|
if (port->irq != ser->irq)
|
|
ret = -EINVAL;
|
|
if (ser->io_type != SERIAL_IO_MEM)
|
|
ret = -EINVAL;
|
|
if (port->uartclk / 16 != ser->baud_base)
|
|
ret = -EINVAL;
|
|
if ((void *)port->mapbase != ser->iomem_base)
|
|
ret = -EINVAL;
|
|
if (port->iobase != ser->port)
|
|
ret = -EINVAL;
|
|
if (ser->hub6 != 0)
|
|
ret = -EINVAL;
|
|
return ret;
|
|
}
|
|
|
|
static struct uart_ops at91_pops = {
|
|
.tx_empty = at91_tx_empty,
|
|
.set_mctrl = at91_set_mctrl,
|
|
.get_mctrl = at91_get_mctrl,
|
|
.stop_tx = at91_stop_tx,
|
|
.start_tx = at91_start_tx,
|
|
.stop_rx = at91_stop_rx,
|
|
.enable_ms = at91_enable_ms,
|
|
.break_ctl = at91_break_ctl,
|
|
.startup = at91_startup,
|
|
.shutdown = at91_shutdown,
|
|
.set_termios = at91_set_termios,
|
|
.type = at91_type,
|
|
.release_port = at91_release_port,
|
|
.request_port = at91_request_port,
|
|
.config_port = at91_config_port,
|
|
.verify_port = at91_verify_port,
|
|
.pm = at91_serial_pm,
|
|
};
|
|
|
|
/*
|
|
* Configure the port from the platform device resource info.
|
|
*/
|
|
static void __devinit at91_init_port(struct at91_uart_port *at91_port, struct platform_device *pdev)
|
|
{
|
|
struct uart_port *port = &at91_port->uart;
|
|
struct atmel_uart_data *data = pdev->dev.platform_data;
|
|
|
|
port->iotype = UPIO_MEM;
|
|
port->flags = UPF_BOOT_AUTOCONF;
|
|
port->ops = &at91_pops;
|
|
port->fifosize = 1;
|
|
port->line = pdev->id;
|
|
port->dev = &pdev->dev;
|
|
|
|
port->mapbase = pdev->resource[0].start;
|
|
port->irq = pdev->resource[1].start;
|
|
|
|
if (port->mapbase == AT91_VA_BASE_SYS + AT91_DBGU) /* Part of system perpherals - already mapped */
|
|
port->membase = (void __iomem *) port->mapbase;
|
|
else {
|
|
port->flags |= UPF_IOREMAP;
|
|
port->membase = NULL;
|
|
}
|
|
|
|
if (!at91_port->clk) { /* for console, the clock could already be configured */
|
|
at91_port->clk = clk_get(&pdev->dev, "usart");
|
|
clk_enable(at91_port->clk);
|
|
port->uartclk = clk_get_rate(at91_port->clk);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Register board-specific modem-control line handlers.
|
|
*/
|
|
void __init at91_register_uart_fns(struct at91_port_fns *fns)
|
|
{
|
|
if (fns->enable_ms)
|
|
at91_pops.enable_ms = fns->enable_ms;
|
|
if (fns->get_mctrl)
|
|
at91_pops.get_mctrl = fns->get_mctrl;
|
|
if (fns->set_mctrl)
|
|
at91_pops.set_mctrl = fns->set_mctrl;
|
|
at91_open = fns->open;
|
|
at91_close = fns->close;
|
|
at91_pops.pm = fns->pm;
|
|
at91_pops.set_wake = fns->set_wake;
|
|
}
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_ATMEL_CONSOLE
|
|
static void at91_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
while (!(UART_GET_CSR(port) & AT91_US_TXRDY))
|
|
barrier();
|
|
UART_PUT_CHAR(port, ch);
|
|
}
|
|
|
|
/*
|
|
* Interrupts are disabled on entering
|
|
*/
|
|
static void at91_console_write(struct console *co, const char *s, u_int count)
|
|
{
|
|
struct uart_port *port = &at91_ports[co->index].uart;
|
|
unsigned int status, imr;
|
|
|
|
/*
|
|
* First, save IMR and then disable interrupts
|
|
*/
|
|
imr = UART_GET_IMR(port); /* get interrupt mask */
|
|
UART_PUT_IDR(port, AT91_US_RXRDY | AT91_US_TXRDY);
|
|
|
|
uart_console_write(port, s, count, at91_console_putchar);
|
|
|
|
/*
|
|
* Finally, wait for transmitter to become empty
|
|
* and restore IMR
|
|
*/
|
|
do {
|
|
status = UART_GET_CSR(port);
|
|
} while (!(status & AT91_US_TXRDY));
|
|
UART_PUT_IER(port, imr); /* set interrupts back the way they were */
|
|
}
|
|
|
|
/*
|
|
* If the port was already initialised (eg, by a boot loader), try to determine
|
|
* the current setup.
|
|
*/
|
|
static void __init at91_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
|
|
{
|
|
unsigned int mr, quot;
|
|
|
|
// TODO: CR is a write-only register
|
|
// unsigned int cr;
|
|
//
|
|
// cr = UART_GET_CR(port) & (AT91_US_RXEN | AT91_US_TXEN);
|
|
// if (cr == (AT91_US_RXEN | AT91_US_TXEN)) {
|
|
// /* ok, the port was enabled */
|
|
// }
|
|
|
|
mr = UART_GET_MR(port) & AT91_US_CHRL;
|
|
if (mr == AT91_US_CHRL_8)
|
|
*bits = 8;
|
|
else
|
|
*bits = 7;
|
|
|
|
mr = UART_GET_MR(port) & AT91_US_PAR;
|
|
if (mr == AT91_US_PAR_EVEN)
|
|
*parity = 'e';
|
|
else if (mr == AT91_US_PAR_ODD)
|
|
*parity = 'o';
|
|
|
|
quot = UART_GET_BRGR(port);
|
|
*baud = port->uartclk / (16 * (quot));
|
|
}
|
|
|
|
static int __init at91_console_setup(struct console *co, char *options)
|
|
{
|
|
struct uart_port *port = &at91_ports[co->index].uart;
|
|
int baud = 115200;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
if (port->membase == 0) /* Port not initialized yet - delay setup */
|
|
return -ENODEV;
|
|
|
|
UART_PUT_IDR(port, -1); /* disable interrupts */
|
|
UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
|
|
UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
else
|
|
at91_console_get_options(port, &baud, &parity, &bits);
|
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct uart_driver at91_uart;
|
|
|
|
static struct console at91_console = {
|
|
.name = AT91_DEVICENAME,
|
|
.write = at91_console_write,
|
|
.device = uart_console_device,
|
|
.setup = at91_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &at91_uart,
|
|
};
|
|
|
|
#define AT91_CONSOLE_DEVICE &at91_console
|
|
|
|
/*
|
|
* Early console initialization (before VM subsystem initialized).
|
|
*/
|
|
static int __init at91_console_init(void)
|
|
{
|
|
if (atmel_default_console_device) {
|
|
add_preferred_console(AT91_DEVICENAME, atmel_default_console_device->id, NULL);
|
|
at91_init_port(&(at91_ports[atmel_default_console_device->id]), atmel_default_console_device);
|
|
register_console(&at91_console);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
console_initcall(at91_console_init);
|
|
|
|
/*
|
|
* Late console initialization.
|
|
*/
|
|
static int __init at91_late_console_init(void)
|
|
{
|
|
if (atmel_default_console_device && !(at91_console.flags & CON_ENABLED))
|
|
register_console(&at91_console);
|
|
|
|
return 0;
|
|
}
|
|
core_initcall(at91_late_console_init);
|
|
|
|
#else
|
|
#define AT91_CONSOLE_DEVICE NULL
|
|
#endif
|
|
|
|
static struct uart_driver at91_uart = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "at91_serial",
|
|
.dev_name = AT91_DEVICENAME,
|
|
.major = SERIAL_AT91_MAJOR,
|
|
.minor = MINOR_START,
|
|
.nr = ATMEL_MAX_UART,
|
|
.cons = AT91_CONSOLE_DEVICE,
|
|
};
|
|
|
|
#ifdef CONFIG_PM
|
|
static int at91_serial_suspend(struct platform_device *pdev, pm_message_t state)
|
|
{
|
|
struct uart_port *port = platform_get_drvdata(pdev);
|
|
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
|
|
|
|
if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
|
|
enable_irq_wake(port->irq);
|
|
else {
|
|
disable_irq_wake(port->irq);
|
|
uart_suspend_port(&at91_uart, port);
|
|
at91_port->suspended = 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int at91_serial_resume(struct platform_device *pdev)
|
|
{
|
|
struct uart_port *port = platform_get_drvdata(pdev);
|
|
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
|
|
|
|
if (at91_port->suspended) {
|
|
uart_resume_port(&at91_uart, port);
|
|
at91_port->suspended = 0;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
#define at91_serial_suspend NULL
|
|
#define at91_serial_resume NULL
|
|
#endif
|
|
|
|
static int __devinit at91_serial_probe(struct platform_device *pdev)
|
|
{
|
|
struct at91_uart_port *port;
|
|
int ret;
|
|
|
|
port = &at91_ports[pdev->id];
|
|
at91_init_port(port, pdev);
|
|
|
|
ret = uart_add_one_port(&at91_uart, &port->uart);
|
|
if (!ret) {
|
|
device_init_wakeup(&pdev->dev, 1);
|
|
platform_set_drvdata(pdev, port);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int __devexit at91_serial_remove(struct platform_device *pdev)
|
|
{
|
|
struct uart_port *port = platform_get_drvdata(pdev);
|
|
struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
|
|
int ret = 0;
|
|
|
|
clk_disable(at91_port->clk);
|
|
clk_put(at91_port->clk);
|
|
|
|
device_init_wakeup(&pdev->dev, 0);
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
if (port) {
|
|
ret = uart_remove_one_port(&at91_uart, port);
|
|
kfree(port);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static struct platform_driver at91_serial_driver = {
|
|
.probe = at91_serial_probe,
|
|
.remove = __devexit_p(at91_serial_remove),
|
|
.suspend = at91_serial_suspend,
|
|
.resume = at91_serial_resume,
|
|
.driver = {
|
|
.name = "atmel_usart",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
|
|
static int __init at91_serial_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = uart_register_driver(&at91_uart);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = platform_driver_register(&at91_serial_driver);
|
|
if (ret)
|
|
uart_unregister_driver(&at91_uart);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __exit at91_serial_exit(void)
|
|
{
|
|
platform_driver_unregister(&at91_serial_driver);
|
|
uart_unregister_driver(&at91_uart);
|
|
}
|
|
|
|
module_init(at91_serial_init);
|
|
module_exit(at91_serial_exit);
|
|
|
|
MODULE_AUTHOR("Rick Bronson");
|
|
MODULE_DESCRIPTION("AT91 generic serial port driver");
|
|
MODULE_LICENSE("GPL");
|