e6ae744dd2
Delete obsoleted stuff from arch Makefile and rename constants.h to asm-offsets.h Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
112 lines
4 KiB
ArmAsm
112 lines
4 KiB
ArmAsm
/*
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NetWinder Floating Point Emulator
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(c) Rebel.COM, 1998
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(c) Philip Blundell 1998-1999
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Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <asm/asm-offsets.h>
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/* This is the kernel's entry point into the floating point emulator.
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It is called from the kernel with code similar to this:
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mov fp, #0
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teqp pc, #PSR_I_BIT | MODE_SVC
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ldr r4, .LC2
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ldr pc, [r4] @ Call FP module USR entry point
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The kernel expects the emulator to return via one of two possible
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points of return it passes to the emulator. The emulator, if
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successful in its emulation, jumps to ret_from_exception and the
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kernel takes care of returning control from the trap to the user code.
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If the emulator is unable to emulate the instruction, it returns to
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fpundefinstr and the kernel halts the user program with a core dump.
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This routine does four things:
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1) It saves SP into a variable called userRegisters. The kernel has
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created a struct pt_regs on the stack and saved the user registers
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into it. See /usr/include/asm/proc/ptrace.h for details. The
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emulator code uses userRegisters as the base of an array of words from
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which the contents of the registers can be extracted.
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2) It locates the FP emulator work area within the TSS structure and
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points `fpa11' to it.
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3) It calls EmulateAll to emulate a floating point instruction.
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EmulateAll returns 1 if the emulation was successful, or 0 if not.
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4) If an instruction has been emulated successfully, it looks ahead at
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the next instruction. If it is a floating point instruction, it
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executes the instruction, without returning to user space. In this
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way it repeatedly looks ahead and executes floating point instructions
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until it encounters a non floating point instruction, at which time it
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returns via _fpreturn.
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This is done to reduce the effect of the trap overhead on each
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floating point instructions. GCC attempts to group floating point
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instructions to allow the emulator to spread the cost of the trap over
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several floating point instructions. */
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.globl nwfpe_enter
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nwfpe_enter:
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mov sl, sp
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ldr r5, [sp, #60] @ get contents of PC
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bic r5, r5, #0xfc000003
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ldr r0, [r5, #-4] @ get actual instruction into r0
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bl EmulateAll @ emulate the instruction
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1: cmp r0, #0 @ was emulation successful
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beq fpundefinstr @ no, return failure
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next:
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.Lx1: ldrt r6, [r5], #4 @ get the next instruction and
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@ increment PC
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and r2, r6, #0x0F000000 @ test for FP insns
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teq r2, #0x0C000000
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teqne r2, #0x0D000000
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teqne r2, #0x0E000000
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bne ret_from_exception @ return ok if not a fp insn
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ldr r9, [sp, #60] @ get new condition codes
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and r9, r9, #0xfc000003
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orr r7, r5, r9
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str r7, [sp, #60] @ update PC copy in regs
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mov r0, r6 @ save a copy
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mov r1, r9 @ fetch the condition codes
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bl checkCondition @ check the condition
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cmp r0, #0 @ r0 = 0 ==> condition failed
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@ if condition code failed to match, next insn
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beq next @ get the next instruction;
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mov r0, r6 @ prepare for EmulateAll()
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adr lr, 1b
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orr lr, lr, #3
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b EmulateAll @ if r0 != 0, goto EmulateAll
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.Lret: b ret_from_exception @ let the user eat segfaults
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@ We need to be prepared for the instruction at .Lx1 to fault.
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@ Emit the appropriate exception gunk to fix things up.
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.section __ex_table,"a"
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.align 3
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.long .Lx1
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ldr lr, [lr, $(.Lret - .Lx1)/4]
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.previous
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