a53c8fab3f
Remove the file name from the comment at top of many files. In most cases the file name was wrong anyway, so it's rather pointless. Also unify the IBM copyright statement. We did have a lot of sightly different statements and wanted to change them one after another whenever a file gets touched. However that never happened. Instead people start to take the old/"wrong" statements to use as a template for new files. So unify all of them in one go. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
105 lines
3 KiB
ArmAsm
105 lines
3 KiB
ArmAsm
/*
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* Copyright IBM Corp. 1999, 2010
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*
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* Author(s): Hartmut Penner <hp@de.ibm.com>
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* Martin Schwidefsky <schwidefsky@de.ibm.com>
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* Rob van der Heij <rvdhei@iae.nl>
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* Heiko Carstens <heiko.carstens@de.ibm.com>
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*
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*/
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <asm/page.h>
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__HEAD
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ENTRY(startup_continue)
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larl %r1,sched_clock_base_cc
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mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK
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larl %r13,.LPG1 # get base
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lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
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lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
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# move IPL device to lowcore
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lghi %r0,__LC_PASTE
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stg %r0,__LC_VDSO_PER_CPU
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#
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# Setup stack
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#
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larl %r15,init_thread_union
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stg %r15,__LC_THREAD_INFO # cache thread info in lowcore
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lg %r14,__TI_task(%r15) # cache current in lowcore
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stg %r14,__LC_CURRENT
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aghi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
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stg %r15,__LC_KERNEL_STACK # set end of kernel stack
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aghi %r15,-160
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#
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# Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
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# and create a kernel NSS if the SAVESYS= parm is defined
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#
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brasl %r14,startup_init
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lpswe .Lentry-.LPG1(13) # jump to _stext in primary-space,
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# virtual and never return ...
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.align 16
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.LPG1:
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.Lentry:.quad 0x0000000180000000,_stext
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.Lctl: .quad 0x04040000 # cr0: AFP registers & secondary space
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.quad 0 # cr1: primary space segment table
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.quad .Lduct # cr2: dispatchable unit control table
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.quad 0 # cr3: instruction authorization
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.quad 0 # cr4: instruction authorization
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.quad .Lduct # cr5: primary-aste origin
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.quad 0 # cr6: I/O interrupts
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.quad 0 # cr7: secondary space segment table
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.quad 0 # cr8: access registers translation
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.quad 0 # cr9: tracing off
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.quad 0 # cr10: tracing off
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.quad 0 # cr11: tracing off
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.quad 0 # cr12: tracing off
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.quad 0 # cr13: home space segment table
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.quad 0xc0000000 # cr14: machine check handling off
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.quad 0 # cr15: linkage stack operations
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.Lpcmsk:.quad 0x0000000180000000
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.L4malign:.quad 0xffffffffffc00000
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.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
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.Lnop: .long 0x07000700
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.Lparmaddr:
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.quad PARMAREA
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.align 64
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.Lduct: .long 0,0,0,0,.Lduald,0,0,0
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.long 0,0,0,0,0,0,0,0
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.align 128
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.Lduald:.rept 8
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.long 0x80000000,0,0,0 # invalid access-list entries
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.endr
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ENTRY(_ehead)
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#ifdef CONFIG_SHARED_KERNEL
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.org 0x100000 - 0x11000 # head.o ends at 0x11000
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#endif
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#
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# startup-code, running in absolute addressing mode
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#
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ENTRY(_stext)
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basr %r13,0 # get base
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.LPG3:
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# check control registers
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stctg %c0,%c15,0(%r15)
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oi 6(%r15),0x60 # enable sigp emergency & external call
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oi 4(%r15),0x10 # switch on low address proctection
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lctlg %c0,%c15,0(%r15)
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lam 0,15,.Laregs-.LPG3(%r13) # load acrs needed by uaccess
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brasl %r14,start_kernel # go to C code
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#
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# We returned from start_kernel ?!? PANIK
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#
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basr %r13,0
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lpswe .Ldw-.(%r13) # load disabled wait psw
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.align 8
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.Ldw: .quad 0x0002000180000000,0x0000000000000000
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.Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
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