824877111c
Impact: cleanup Now that arch/x86/pci/pci.h is used in a number of other places as well, move the lowlevel x86 pci definitions into the architecture include files. (not to be confused with the existing arch/x86/include/asm/pci.h file, which provides public details about x86 PCI) Tested on: X86_32_UP, X86_32_SMP and X86_64_SMP Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
75 lines
1.5 KiB
C
75 lines
1.5 KiB
C
/*
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* legacy.c - traditional, old school PCI bus probing
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <asm/pci_x86.h>
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/*
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* Discover remaining PCI buses in case there are peer host bridges.
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* We use the number of last PCI bus provided by the PCI BIOS.
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*/
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static void __devinit pcibios_fixup_peer_bridges(void)
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{
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int n, devfn;
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long node;
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if (pcibios_last_bus <= 0 || pcibios_last_bus > 0xff)
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return;
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DBG("PCI: Peer bridge fixup\n");
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for (n=0; n <= pcibios_last_bus; n++) {
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u32 l;
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if (pci_find_bus(0, n))
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continue;
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node = get_mp_bus_to_node(n);
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for (devfn = 0; devfn < 256; devfn += 8) {
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if (!raw_pci_read(0, n, devfn, PCI_VENDOR_ID, 2, &l) &&
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l != 0x0000 && l != 0xffff) {
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DBG("Found device at %02x:%02x [%04x]\n", n, devfn, l);
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printk(KERN_INFO "PCI: Discovered peer bus %02x\n", n);
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pci_scan_bus_on_node(n, &pci_root_ops, node);
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break;
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}
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}
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}
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}
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static int __init pci_legacy_init(void)
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{
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if (!raw_pci_ops) {
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printk("PCI: System does not support PCI\n");
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return 0;
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}
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if (pcibios_scanned++)
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return 0;
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printk("PCI: Probing PCI hardware\n");
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pci_root_bus = pcibios_scan_root(0);
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if (pci_root_bus)
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pci_bus_add_devices(pci_root_bus);
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pcibios_fixup_peer_bridges();
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return 0;
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}
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int __init pci_subsys_init(void)
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{
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#ifdef CONFIG_X86_NUMAQ
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pci_numaq_init();
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#endif
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#ifdef CONFIG_ACPI
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pci_acpi_init();
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#endif
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#ifdef CONFIG_X86_VISWS
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pci_visws_init();
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#endif
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pci_legacy_init();
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pcibios_irq_init();
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pcibios_init();
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return 0;
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}
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subsys_initcall(pci_subsys_init);
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