cb24f57fe6
This moves the Analog switching code into the PHY files. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
155 lines
3.7 KiB
C
155 lines
3.7 KiB
C
/*
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Broadcom B43 wireless driver
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IEEE 802.11g LP-PHY driver
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Copyright (c) 2008 Michael Buesch <mb@bu3sch.de>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING. If not, write to
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the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
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Boston, MA 02110-1301, USA.
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*/
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#include "b43.h"
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#include "phy_lp.h"
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#include "phy_common.h"
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static int b43_lpphy_op_allocate(struct b43_wldev *dev)
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{
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struct b43_phy_lp *lpphy;
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lpphy = kzalloc(sizeof(*lpphy), GFP_KERNEL);
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if (!lpphy)
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return -ENOMEM;
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dev->phy.lp = lpphy;
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return 0;
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}
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static void b43_lpphy_op_prepare_structs(struct b43_wldev *dev)
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{
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struct b43_phy *phy = &dev->phy;
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struct b43_phy_lp *lpphy = phy->lp;
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memset(lpphy, 0, sizeof(*lpphy));
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//TODO
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}
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static void b43_lpphy_op_free(struct b43_wldev *dev)
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{
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struct b43_phy_lp *lpphy = dev->phy.lp;
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kfree(lpphy);
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dev->phy.lp = NULL;
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}
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static int b43_lpphy_op_init(struct b43_wldev *dev)
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{
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//TODO
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return 0;
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}
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static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
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{
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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return b43_read16(dev, B43_MMIO_PHY_DATA);
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}
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static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
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{
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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b43_write16(dev, B43_MMIO_PHY_DATA, value);
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}
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static u16 b43_lpphy_op_radio_read(struct b43_wldev *dev, u16 reg)
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{
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/* Register 1 is a 32-bit register. */
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B43_WARN_ON(reg == 1);
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/* LP-PHY needs a special bit set for read access */
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if (dev->phy.rev < 2) {
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if (reg != 0x4001)
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reg |= 0x100;
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} else
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reg |= 0x200;
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b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
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return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
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}
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static void b43_lpphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
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{
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/* Register 1 is a 32-bit register. */
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B43_WARN_ON(reg == 1);
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b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
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b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
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}
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static void b43_lpphy_op_software_rfkill(struct b43_wldev *dev,
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enum rfkill_state state)
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{
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//TODO
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}
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static int b43_lpphy_op_switch_channel(struct b43_wldev *dev,
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unsigned int new_channel)
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{
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//TODO
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return 0;
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}
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static unsigned int b43_lpphy_op_get_default_chan(struct b43_wldev *dev)
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{
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return 1; /* Default to channel 1 */
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}
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static void b43_lpphy_op_set_rx_antenna(struct b43_wldev *dev, int antenna)
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{
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//TODO
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}
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static void b43_lpphy_op_adjust_txpower(struct b43_wldev *dev)
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{
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//TODO
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}
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static enum b43_txpwr_result b43_lpphy_op_recalc_txpower(struct b43_wldev *dev,
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bool ignore_tssi)
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{
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//TODO
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return B43_TXPWR_RES_DONE;
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}
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const struct b43_phy_operations b43_phyops_lp = {
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.allocate = b43_lpphy_op_allocate,
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.free = b43_lpphy_op_free,
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.prepare_structs = b43_lpphy_op_prepare_structs,
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.init = b43_lpphy_op_init,
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.phy_read = b43_lpphy_op_read,
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.phy_write = b43_lpphy_op_write,
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.radio_read = b43_lpphy_op_radio_read,
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.radio_write = b43_lpphy_op_radio_write,
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.software_rfkill = b43_lpphy_op_software_rfkill,
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.switch_analog = b43_phyop_switch_analog_generic,
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.switch_channel = b43_lpphy_op_switch_channel,
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.get_default_chan = b43_lpphy_op_get_default_chan,
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.set_rx_antenna = b43_lpphy_op_set_rx_antenna,
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.recalc_txpower = b43_lpphy_op_recalc_txpower,
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.adjust_txpower = b43_lpphy_op_adjust_txpower,
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};
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