64039be822
The L310 cache controller's interface is almost identical to the L210. One major difference is that the PL310 can have up to 16 ways. This change uses the cache's part ID and the Associativity bits in the AUX_CTRL register to determine the number of ways. Also, this version prints out the CACHE_ID and AUX_CTRL registers. Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Jason S. McMullan <jason.mcmullan@netronome.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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| .. | ||
| arm_timer.h | ||
| cache-l2x0.h | ||
| cache-tauros2.h | ||
| clps7111.h | ||
| coresight.h | ||
| cs89712.h | ||
| debug-8250.S | ||
| debug-pl01x.S | ||
| dec21285.h | ||
| entry-macro-iomd.S | ||
| ep7211.h | ||
| ep7212.h | ||
| gic.h | ||
| icst307.h | ||
| icst525.h | ||
| ioc.h | ||
| iomd.h | ||
| iop3xx-adma.h | ||
| iop3xx-gpio.h | ||
| iop3xx.h | ||
| iop_adma.h | ||
| it8152.h | ||
| linkup-l1110.h | ||
| locomo.h | ||
| memc.h | ||
| pci_v3.h | ||
| pl080.h | ||
| sa1111.h | ||
| scoop.h | ||
| ssp.h | ||
| uengine.h | ||
| vic.h | ||