efcac6589a
The DSCR (aka Data Stream Control Register) is supported on some server PowerPC chips and allow some control over the prefetch of data streams. This patch allows the value to be specified per thread by emulating the corresponding mfspr and mtspr instructions. Children of such threads inherit the value. Other threads use a default value that can be specified in sysfs - /sys/devices/system/cpu/dscr_default. If a thread starts with non default value in the sysfs entry, all children threads inherit this non default value even if the sysfs value is changed later. Signed-off-by: Alexey Kardashevskiy <aik@au1.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
92 lines
2.4 KiB
C
92 lines
2.4 KiB
C
/*
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* Copyright 2007 Sony Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _ASM_POWERPC_EMULATED_OPS_H
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#define _ASM_POWERPC_EMULATED_OPS_H
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#include <asm/atomic.h>
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#include <linux/perf_event.h>
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#ifdef CONFIG_PPC_EMULATED_STATS
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struct ppc_emulated_entry {
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const char *name;
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atomic_t val;
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};
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extern struct ppc_emulated {
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#ifdef CONFIG_ALTIVEC
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struct ppc_emulated_entry altivec;
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#endif
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struct ppc_emulated_entry dcba;
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struct ppc_emulated_entry dcbz;
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struct ppc_emulated_entry fp_pair;
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struct ppc_emulated_entry isel;
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struct ppc_emulated_entry mcrxr;
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struct ppc_emulated_entry mfpvr;
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struct ppc_emulated_entry multiple;
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struct ppc_emulated_entry popcntb;
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struct ppc_emulated_entry spe;
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struct ppc_emulated_entry string;
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struct ppc_emulated_entry unaligned;
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#ifdef CONFIG_MATH_EMULATION
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struct ppc_emulated_entry math;
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#elif defined(CONFIG_8XX_MINIMAL_FPEMU)
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struct ppc_emulated_entry 8xx;
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#endif
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#ifdef CONFIG_VSX
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struct ppc_emulated_entry vsx;
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#endif
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#ifdef CONFIG_PPC64
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struct ppc_emulated_entry mfdscr;
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struct ppc_emulated_entry mtdscr;
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#endif
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} ppc_emulated;
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extern u32 ppc_warn_emulated;
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extern void ppc_warn_emulated_print(const char *type);
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#define __PPC_WARN_EMULATED(type) \
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do { \
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atomic_inc(&ppc_emulated.type.val); \
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if (ppc_warn_emulated) \
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ppc_warn_emulated_print(ppc_emulated.type.name); \
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} while (0)
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#else /* !CONFIG_PPC_EMULATED_STATS */
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#define __PPC_WARN_EMULATED(type) do { } while (0)
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#endif /* !CONFIG_PPC_EMULATED_STATS */
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#define PPC_WARN_EMULATED(type, regs) \
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do { \
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, \
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1, 0, regs, 0); \
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__PPC_WARN_EMULATED(type); \
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} while (0)
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#define PPC_WARN_ALIGNMENT(type, regs) \
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do { \
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, \
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1, 0, regs, regs->dar); \
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__PPC_WARN_EMULATED(type); \
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} while (0)
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#endif /* _ASM_POWERPC_EMULATED_OPS_H */
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