1113 lines
28 KiB
C
1113 lines
28 KiB
C
/******************************************************************************
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* Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
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*
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* Based on the r8180 driver, which is:
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* Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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******************************************************************************/
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#ifndef _RTL_CORE_H
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#define _RTL_CORE_H
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/sched.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/netdevice.h>
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#include <linux/pci.h>
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#include <linux/etherdevice.h>
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#include <linux/delay.h>
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#include <linux/rtnetlink.h>
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#include <linux/wireless.h>
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#include <linux/timer.h>
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#include <linux/proc_fs.h>
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#include <linux/if_arp.h>
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#include <linux/random.h>
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#include <linux/version.h>
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#include <asm/io.h>
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#include "rtllib.h"
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#include "dot11d.h"
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#include "r8192E_firmware.h"
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#include "r8192E_hw.h"
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#include "r8190P_def.h"
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#include "r8192E_dev.h"
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#include "rtl_debug.h"
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#include "rtl_eeprom.h"
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#include "rtl_ps.h"
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#include "rtl_pci.h"
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#include "rtl_cam.h"
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#define DRV_COPYRIGHT "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
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#define DRV_AUTHOR "<wlanfae@realtek.com>"
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#define DRV_VERSION "0014.0401.2010"
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#define DRV_NAME "rtl819xE"
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#define IS_HARDWARE_TYPE_819xP(_priv) ((((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8190P)||\
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(((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192E))
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#define IS_HARDWARE_TYPE_8192SE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192SE)
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#define IS_HARDWARE_TYPE_8192CE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192CE)
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#define IS_HARDWARE_TYPE_8192CU(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192CU)
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#define IS_HARDWARE_TYPE_8192DE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192DE)
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#define IS_HARDWARE_TYPE_8192DU(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192DU)
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#define RTL_PCI_DEVICE(vend, dev, cfg) \
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.vendor = (vend), .device = (dev), \
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.subvendor = PCI_ANY_ID, .subdevice =PCI_ANY_ID , \
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.driver_data = (kernel_ulong_t)&(cfg)
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typedef irqreturn_t irqreturn_type;
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#define rtl8192_interrupt(x,y,z) rtl8192_interrupt_rsl(x,y)
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#define RTL_MAX_SCAN_SIZE 128
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#define RTL_RATE_MAX 30
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#define TOTAL_CAM_ENTRY 32
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#define CAM_CONTENT_COUNT 8
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#ifndef BIT
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#define BIT(_i) (1<<(_i))
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#endif
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#define IS_NIC_DOWN(priv) (!(priv)->up)
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#define IS_ADAPTER_SENDS_BEACON(dev) 0
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#define IS_UNDER_11N_AES_MODE(_rtllib) ((_rtllib->pHTInfo->bCurrentHTSupport == true) &&\
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(_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
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#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000
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#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
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#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000
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#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
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#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000
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#define HAL_HW_PCI_REVISION_ID_8192SE 0x10
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#define HAL_HW_PCI_REVISION_ID_8192CE 0x1
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#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000
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#define HAL_HW_PCI_REVISION_ID_8192DE 0x0
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#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000
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#define HAL_HW_PCI_8180_DEVICE_ID 0x8180
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#define HAL_HW_PCI_8185_DEVICE_ID 0x8185
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#define HAL_HW_PCI_8188_DEVICE_ID 0x8188
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#define HAL_HW_PCI_8198_DEVICE_ID 0x8198
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#define HAL_HW_PCI_8190_DEVICE_ID 0x8190
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#define HAL_HW_PCI_8192_DEVICE_ID 0x8192
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#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192
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#define HAL_HW_PCI_8174_DEVICE_ID 0x8174
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#define HAL_HW_PCI_8173_DEVICE_ID 0x8173
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#define HAL_HW_PCI_8172_DEVICE_ID 0x8172
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#define HAL_HW_PCI_8171_DEVICE_ID 0x8171
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#define HAL_HW_PCI_0045_DEVICE_ID 0x0045
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#define HAL_HW_PCI_0046_DEVICE_ID 0x0046
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#define HAL_HW_PCI_0044_DEVICE_ID 0x0044
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#define HAL_HW_PCI_0047_DEVICE_ID 0x0047
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#define HAL_HW_PCI_700F_DEVICE_ID 0x700F
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#define HAL_HW_PCI_701F_DEVICE_ID 0x701F
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#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
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#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191
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#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178
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#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177
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#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176
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#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191
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#define HAL_HW_PCI_8192DE_DEVICE_ID 0x092D
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#define HAL_HW_PCI_8192DU_DEVICE_ID 0x092D
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#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
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#define RTLLIB_WATCH_DOG_TIME 2000
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#define MAX_DEV_ADDR_SIZE 8 /* support till 64 bit bus width OS */
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#define MAX_FIRMWARE_INFORMATION_SIZE 32
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#define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
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#define ENCRYPTION_MAX_OVERHEAD 128
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#define MAX_FRAGMENT_COUNT 8
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#define MAX_TRANSMIT_BUFFER_SIZE (1600+(MAX_802_11_HEADER_LENGTH+ENCRYPTION_MAX_OVERHEAD)*MAX_FRAGMENT_COUNT)
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#define scrclng 4
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#define DEFAULT_FRAG_THRESHOLD 2342U
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#define MIN_FRAG_THRESHOLD 256U
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#define DEFAULT_BEACONINTERVAL 0x64U
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#define DEFAULT_SSID ""
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#define DEFAULT_RETRY_RTS 7
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#define DEFAULT_RETRY_DATA 7
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#define PRISM_HDR_SIZE 64
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#define PHY_RSSI_SLID_WIN_MAX 100
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#define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
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#define TxBBGainTableLength 37
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#define CCKTxBBGainTableLength 23
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#define CHANNEL_PLAN_LEN 10
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#define sCrcLng 4
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#define NIC_SEND_HANG_THRESHOLD_NORMAL 4
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#define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8
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#define MAX_TX_QUEUE 9
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#define MAX_RX_QUEUE 1
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#define MAX_RX_COUNT 64
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#define MAX_TX_QUEUE_COUNT 9
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enum RTL819x_PHY_PARAM {
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RTL819X_PHY_MACPHY_REG = 0,
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RTL819X_PHY_MACPHY_REG_PG = 1,
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RTL8188C_PHY_MACREG =2,
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RTL8192C_PHY_MACREG =3,
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RTL819X_PHY_REG = 4,
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RTL819X_PHY_REG_1T2R = 5,
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RTL819X_PHY_REG_to1T1R = 6,
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RTL819X_PHY_REG_to1T2R = 7,
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RTL819X_PHY_REG_to2T2R = 8,
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RTL819X_PHY_REG_PG = 9,
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RTL819X_AGC_TAB = 10,
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RTL819X_PHY_RADIO_A =11,
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RTL819X_PHY_RADIO_A_1T =12,
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RTL819X_PHY_RADIO_A_2T =13,
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RTL819X_PHY_RADIO_B =14,
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RTL819X_PHY_RADIO_B_GM =15,
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RTL819X_PHY_RADIO_C =16,
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RTL819X_PHY_RADIO_D =17,
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RTL819X_EEPROM_MAP =18,
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RTL819X_EFUSE_MAP =19,
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};
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enum RTL_DEBUG {
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COMP_TRACE = BIT0,
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COMP_DBG = BIT1,
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COMP_INIT = BIT2,
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COMP_RECV = BIT3,
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COMP_SEND = BIT4,
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COMP_CMD = BIT5,
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COMP_POWER = BIT6,
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COMP_EPROM = BIT7,
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COMP_SWBW = BIT8,
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COMP_SEC = BIT9,
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COMP_LPS = BIT10,
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COMP_QOS = BIT11,
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COMP_RATE = BIT12,
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COMP_RXDESC = BIT13,
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COMP_PHY = BIT14,
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COMP_DIG = BIT15,
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COMP_TXAGC = BIT16,
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COMP_HALDM = BIT17,
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COMP_POWER_TRACKING = BIT18,
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COMP_CH = BIT19,
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COMP_RF = BIT20,
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COMP_FIRMWARE = BIT21,
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COMP_HT = BIT22,
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COMP_RESET = BIT23,
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COMP_CMDPKT = BIT24,
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COMP_SCAN = BIT25,
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COMP_PS = BIT26,
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COMP_DOWN = BIT27,
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COMP_INTR = BIT28,
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COMP_LED = BIT29,
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COMP_MLME = BIT30,
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COMP_ERR = BIT31
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};
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typedef enum{
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NIC_UNKNOWN = 0,
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NIC_8192E = 1,
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NIC_8190P = 2,
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NIC_8192SE = 4,
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NIC_8192CE = 5,
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NIC_8192CU = 6,
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NIC_8192DE = 7,
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NIC_8192DU = 8,
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} nic_t;
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typedef enum _RT_EEPROM_TYPE{
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EEPROM_93C46,
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EEPROM_93C56,
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EEPROM_BOOT_EFUSE,
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}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE;
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typedef enum _tag_TxCmd_Config_Index{
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TXCMD_TXRA_HISTORY_CTRL = 0xFF900000,
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TXCMD_RESET_TX_PKT_BUFF = 0xFF900001,
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TXCMD_RESET_RX_PKT_BUFF = 0xFF900002,
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TXCMD_SET_TX_DURATION = 0xFF900003,
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TXCMD_SET_RX_RSSI = 0xFF900004,
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TXCMD_SET_TX_PWR_TRACKING = 0xFF900005,
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TXCMD_XXXX_CTRL,
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}DCMD_TXCMD_OP;
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typedef enum _RT_RF_TYPE_819xU{
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RF_TYPE_MIN = 0,
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RF_8225,
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RF_8256,
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RF_8258,
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RF_6052=4,
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RF_PSEUDO_11N = 5,
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}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
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typedef enum tag_Rf_Operatetion_State
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{
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RF_STEP_INIT = 0,
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RF_STEP_NORMAL,
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RF_STEP_MAX
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}RF_STEP_E;
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typedef enum _RT_STATUS{
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RT_STATUS_SUCCESS,
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RT_STATUS_FAILURE,
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RT_STATUS_PENDING,
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RT_STATUS_RESOURCE
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}RT_STATUS,*PRT_STATUS;
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typedef enum _RT_CUSTOMER_ID
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{
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RT_CID_DEFAULT = 0,
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RT_CID_8187_ALPHA0 = 1,
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RT_CID_8187_SERCOMM_PS = 2,
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RT_CID_8187_HW_LED = 3,
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RT_CID_8187_NETGEAR = 4,
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RT_CID_WHQL = 5,
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RT_CID_819x_CAMEO = 6,
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RT_CID_819x_RUNTOP = 7,
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RT_CID_819x_Senao = 8,
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RT_CID_TOSHIBA = 9,
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RT_CID_819x_Netcore = 10,
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RT_CID_Nettronix = 11,
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RT_CID_DLINK = 12,
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RT_CID_PRONET = 13,
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RT_CID_COREGA = 14,
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RT_CID_819x_ALPHA = 15,
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RT_CID_819x_Sitecom = 16,
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RT_CID_CCX = 17,
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RT_CID_819x_Lenovo = 18,
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RT_CID_819x_QMI = 19,
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RT_CID_819x_Edimax_Belkin = 20,
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RT_CID_819x_Sercomm_Belkin = 21,
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RT_CID_819x_CAMEO1 = 22,
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RT_CID_819x_MSI = 23,
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RT_CID_819x_Acer = 24,
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RT_CID_819x_HP =27,
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RT_CID_819x_CLEVO = 28,
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RT_CID_819x_Arcadyan_Belkin = 29,
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RT_CID_819x_SAMSUNG = 30,
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RT_CID_819x_WNC_COREGA = 31,
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}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
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typedef enum _RESET_TYPE {
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RESET_TYPE_NORESET = 0x00,
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RESET_TYPE_NORMAL = 0x01,
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RESET_TYPE_SILENT = 0x02
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} RESET_TYPE;
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typedef enum _IC_INFERIORITY_8192S{
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IC_INFERIORITY_A = 0,
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IC_INFERIORITY_B = 1,
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}IC_INFERIORITY_8192S, *PIC_INFERIORITY_8192S;
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typedef enum _PCI_BRIDGE_VENDOR {
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PCI_BRIDGE_VENDOR_INTEL = 0x0,
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PCI_BRIDGE_VENDOR_ATI,
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PCI_BRIDGE_VENDOR_AMD,
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PCI_BRIDGE_VENDOR_SIS ,
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PCI_BRIDGE_VENDOR_UNKNOWN,
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PCI_BRIDGE_VENDOR_MAX ,
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} PCI_BRIDGE_VENDOR;
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typedef struct buffer
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{
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struct buffer *next;
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u32 *buf;
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dma_addr_t dma;
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} buffer;
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typedef struct rtl_reg_debug{
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unsigned int cmd;
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struct {
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unsigned char type;
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unsigned char addr;
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unsigned char page;
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unsigned char length;
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} head;
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unsigned char buf[0xff];
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}rtl_reg_debug;
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typedef struct _rt_9x_tx_rate_history {
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u32 cck[4];
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u32 ofdm[8];
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u32 ht_mcs[4][16];
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}rt_tx_rahis_t, *prt_tx_rahis_t;
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typedef struct _RT_SMOOTH_DATA_4RF {
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char elements[4][100];
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u32 index;
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u32 TotalNum;
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u32 TotalVal[4];
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}RT_SMOOTH_DATA_4RF, *PRT_SMOOTH_DATA_4RF;
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typedef struct Stats
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{
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unsigned long txrdu;
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unsigned long rxrdu;
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unsigned long rxok;
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unsigned long rxframgment;
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unsigned long rxcmdpkt[4];
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unsigned long rxurberr;
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unsigned long rxstaterr;
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unsigned long rxdatacrcerr;
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unsigned long rxmgmtcrcerr;
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unsigned long rxcrcerrmin;
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unsigned long rxcrcerrmid;
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unsigned long rxcrcerrmax;
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unsigned long received_rate_histogram[4][32];
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unsigned long received_preamble_GI[2][32];
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unsigned long rx_AMPDUsize_histogram[5];
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unsigned long rx_AMPDUnum_histogram[5];
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unsigned long numpacket_matchbssid;
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unsigned long numpacket_toself;
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unsigned long num_process_phyinfo;
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unsigned long numqry_phystatus;
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unsigned long numqry_phystatusCCK;
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unsigned long numqry_phystatusHT;
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unsigned long received_bwtype[5];
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unsigned long txnperr;
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unsigned long txnpdrop;
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unsigned long txresumed;
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unsigned long rxoverflow;
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unsigned long rxint;
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unsigned long txnpokint;
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unsigned long ints;
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unsigned long shints;
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unsigned long txoverflow;
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unsigned long txlpokint;
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unsigned long txlpdrop;
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unsigned long txlperr;
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unsigned long txbeokint;
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unsigned long txbedrop;
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unsigned long txbeerr;
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unsigned long txbkokint;
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unsigned long txbkdrop;
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unsigned long txbkerr;
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unsigned long txviokint;
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unsigned long txvidrop;
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unsigned long txvierr;
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unsigned long txvookint;
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unsigned long txvodrop;
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unsigned long txvoerr;
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unsigned long txbeaconokint;
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unsigned long txbeacondrop;
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unsigned long txbeaconerr;
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unsigned long txmanageokint;
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unsigned long txmanagedrop;
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unsigned long txmanageerr;
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unsigned long txcmdpktokint;
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unsigned long txdatapkt;
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unsigned long txfeedback;
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unsigned long txfeedbackok;
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unsigned long txoktotal;
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unsigned long txokbytestotal;
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unsigned long txokinperiod;
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unsigned long txmulticast;
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unsigned long txbytesmulticast;
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unsigned long txbroadcast;
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unsigned long txbytesbroadcast;
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unsigned long txunicast;
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unsigned long txbytesunicast;
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unsigned long rxbytesunicast;
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unsigned long txfeedbackfail;
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unsigned long txerrtotal;
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unsigned long txerrbytestotal;
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unsigned long txerrmulticast;
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unsigned long txerrbroadcast;
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unsigned long txerrunicast;
|
|
unsigned long txretrycount;
|
|
unsigned long txfeedbackretry;
|
|
u8 last_packet_rate;
|
|
unsigned long slide_signal_strength[100];
|
|
unsigned long slide_evm[100];
|
|
unsigned long slide_rssi_total;
|
|
unsigned long slide_evm_total;
|
|
long signal_strength;
|
|
long signal_quality;
|
|
long last_signal_strength_inpercent;
|
|
long recv_signal_power;
|
|
u8 rx_rssi_percentage[4];
|
|
u8 rx_evm_percentage[2];
|
|
long rxSNRdB[4];
|
|
rt_tx_rahis_t txrate;
|
|
u32 Slide_Beacon_pwdb[100];
|
|
u32 Slide_Beacon_Total;
|
|
RT_SMOOTH_DATA_4RF cck_adc_pwdb;
|
|
u32 CurrentShowTxate;
|
|
} Stats;
|
|
|
|
typedef struct ChnlAccessSetting {
|
|
u16 SIFS_Timer;
|
|
u16 DIFS_Timer;
|
|
u16 SlotTimeTimer;
|
|
u16 EIFS_Timer;
|
|
u16 CWminIndex;
|
|
u16 CWmaxIndex;
|
|
}*PCHANNEL_ACCESS_SETTING,CHANNEL_ACCESS_SETTING;
|
|
|
|
typedef enum _TWO_PORT_STATUS
|
|
{
|
|
TWO_PORT_STATUS__DEFAULT_ONLY,
|
|
TWO_PORT_STATUS__EXTENSION_ONLY,
|
|
TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,
|
|
TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,
|
|
TWO_PORT_STATUS__ADHOC,
|
|
TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE
|
|
}TWO_PORT_STATUS;
|
|
|
|
typedef struct _txbbgain_struct
|
|
{
|
|
long txbb_iq_amplifygain;
|
|
u32 txbbgain_value;
|
|
} txbbgain_struct, *ptxbbgain_struct;
|
|
|
|
typedef struct _ccktxbbgain_struct
|
|
{
|
|
u8 ccktxbb_valuearray[8];
|
|
} ccktxbbgain_struct,*pccktxbbgain_struct;
|
|
|
|
typedef struct _init_gain
|
|
{
|
|
u8 xaagccore1;
|
|
u8 xbagccore1;
|
|
u8 xcagccore1;
|
|
u8 xdagccore1;
|
|
u8 cca;
|
|
|
|
} init_gain, *pinit_gain;
|
|
|
|
typedef struct _tx_ring{
|
|
u32 * desc;
|
|
u8 nStuckCount;
|
|
struct _tx_ring * next;
|
|
}__attribute__ ((packed)) tx_ring, * ptx_ring;
|
|
|
|
struct rtl8192_tx_ring {
|
|
tx_desc *desc;
|
|
dma_addr_t dma;
|
|
unsigned int idx;
|
|
unsigned int entries;
|
|
struct sk_buff_head queue;
|
|
};
|
|
|
|
|
|
|
|
struct rtl819x_ops{
|
|
nic_t nic_type;
|
|
void (* get_eeprom_size)(struct net_device* dev);
|
|
void (* init_adapter_variable)(struct net_device* dev);
|
|
void (* init_before_adapter_start)(struct net_device* dev);
|
|
bool (* initialize_adapter)(struct net_device* dev);
|
|
void (*link_change)(struct net_device* dev);
|
|
void (* tx_fill_descriptor)(struct net_device* dev, tx_desc * tx_desc, cb_desc * cb_desc, struct sk_buff *skb);
|
|
void (* tx_fill_cmd_descriptor)(struct net_device* dev, tx_desc_cmd * entry, cb_desc * cb_desc, struct sk_buff *skb);
|
|
bool (* rx_query_status_descriptor)(struct net_device* dev, struct rtllib_rx_stats* stats, rx_desc *pdesc, struct sk_buff* skb);
|
|
bool (* rx_command_packet_handler)(struct net_device *dev, struct sk_buff* skb, rx_desc *pdesc);
|
|
void (* stop_adapter)(struct net_device *dev, bool reset);
|
|
void (* update_ratr_table)(struct net_device* dev);
|
|
void (* irq_enable)(struct net_device* dev);
|
|
void (* irq_disable)(struct net_device* dev);
|
|
void (* irq_clear)(struct net_device* dev);
|
|
void (* rx_enable)(struct net_device* dev);
|
|
void (* tx_enable)(struct net_device* dev);
|
|
void (* interrupt_recognized)(struct net_device *dev, u32 *p_inta, u32 *p_intb);
|
|
bool (* TxCheckStuckHandler)(struct net_device* dev);
|
|
bool (* RxCheckStuckHandler)(struct net_device* dev);
|
|
};
|
|
|
|
typedef struct r8192_priv
|
|
{
|
|
struct pci_dev *pdev;
|
|
struct pci_dev *bridge_pdev;
|
|
|
|
bool bfirst_init;
|
|
bool bfirst_after_down;
|
|
bool initialized_at_probe;
|
|
bool being_init_adapter;
|
|
bool bDriverIsGoingToUnload;
|
|
|
|
int irq;
|
|
short irq_enabled;
|
|
|
|
short up;
|
|
short up_first_time;
|
|
delayed_work_struct_rsl update_beacon_wq;
|
|
delayed_work_struct_rsl watch_dog_wq;
|
|
delayed_work_struct_rsl txpower_tracking_wq;
|
|
delayed_work_struct_rsl rfpath_check_wq;
|
|
delayed_work_struct_rsl gpio_change_rf_wq;
|
|
delayed_work_struct_rsl initialgain_operate_wq;
|
|
delayed_work_struct_rsl check_hw_scan_wq;
|
|
delayed_work_struct_rsl hw_scan_simu_wq;
|
|
delayed_work_struct_rsl start_hw_scan_wq;
|
|
|
|
struct workqueue_struct *priv_wq;
|
|
|
|
CHANNEL_ACCESS_SETTING ChannelAccessSetting;
|
|
|
|
mp_adapter NdisAdapter;
|
|
|
|
struct rtl819x_ops *ops;
|
|
struct rtllib_device *rtllib;
|
|
|
|
work_struct_rsl reset_wq;
|
|
|
|
LOG_INTERRUPT_8190_T InterruptLog;
|
|
|
|
RT_CUSTOMER_ID CustomerID;
|
|
|
|
|
|
RT_RF_TYPE_819xU rf_chip;
|
|
IC_INFERIORITY_8192S IC_Class;
|
|
HT_CHANNEL_WIDTH CurrentChannelBW;
|
|
BB_REGISTER_DEFINITION_T PHYRegDef[4];
|
|
rate_adaptive rate_adaptive;
|
|
|
|
ccktxbbgain_struct cck_txbbgain_table[CCKTxBBGainTableLength];
|
|
ccktxbbgain_struct cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
|
|
|
|
txbbgain_struct txbbgain_table[TxBBGainTableLength];
|
|
|
|
ACM_METHOD AcmMethod;
|
|
|
|
prt_firmware pFirmware;
|
|
rtl819x_loopback_e LoopbackMode;
|
|
firmware_source_e firmware_source;
|
|
|
|
struct timer_list watch_dog_timer;
|
|
struct timer_list fsync_timer;
|
|
struct timer_list gpio_polling_timer;
|
|
|
|
spinlock_t fw_scan_lock;
|
|
spinlock_t irq_lock;
|
|
spinlock_t irq_th_lock;
|
|
spinlock_t tx_lock;
|
|
spinlock_t rf_ps_lock;
|
|
spinlock_t rw_lock;
|
|
spinlock_t rt_h2c_lock;
|
|
spinlock_t rf_lock;
|
|
spinlock_t ps_lock;
|
|
|
|
struct sk_buff_head rx_queue;
|
|
struct sk_buff_head skb_queue;
|
|
|
|
struct tasklet_struct irq_rx_tasklet;
|
|
struct tasklet_struct irq_tx_tasklet;
|
|
struct tasklet_struct irq_prepare_beacon_tasklet;
|
|
|
|
struct semaphore wx_sem;
|
|
struct semaphore rf_sem;
|
|
struct mutex mutex;
|
|
|
|
struct Stats stats;
|
|
struct iw_statistics wstats;
|
|
struct proc_dir_entry *dir_dev;
|
|
|
|
short (*rf_set_sens)(struct net_device *dev,short sens);
|
|
u8 (*rf_set_chan)(struct net_device *dev,u8 ch);
|
|
void (*rf_close)(struct net_device *dev);
|
|
void (*rf_init)(struct net_device *dev);
|
|
|
|
rx_desc *rx_ring[MAX_RX_QUEUE];
|
|
struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
|
|
dma_addr_t rx_ring_dma[MAX_RX_QUEUE];
|
|
unsigned int rx_idx[MAX_RX_QUEUE];
|
|
int rxringcount;
|
|
u16 rxbuffersize;
|
|
|
|
u32 LastRxDescTSFHigh;
|
|
u32 LastRxDescTSFLow;
|
|
|
|
u16 EarlyRxThreshold;
|
|
u32 ReceiveConfig;
|
|
u8 AcmControl;
|
|
u8 RFProgType;
|
|
u8 retry_data;
|
|
u8 retry_rts;
|
|
u16 rts;
|
|
|
|
struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
|
|
int txringcount;
|
|
int txbuffsize;
|
|
int txfwbuffersize;
|
|
atomic_t tx_pending[0x10];
|
|
|
|
u16 ShortRetryLimit;
|
|
u16 LongRetryLimit;
|
|
u32 TransmitConfig;
|
|
u8 RegCWinMin;
|
|
u8 keepAliveLevel;
|
|
|
|
bool sw_radio_on;
|
|
bool bHwRadioOff;
|
|
bool pwrdown;
|
|
bool blinked_ingpio;
|
|
u8 polling_timer_on;
|
|
|
|
/**********************************************************/
|
|
|
|
enum card_type {PCI,MINIPCI,CARDBUS,USB}card_type;
|
|
|
|
work_struct_rsl qos_activate;
|
|
|
|
u8 bIbssCoordinator;
|
|
|
|
short promisc;
|
|
short crcmon;
|
|
|
|
int txbeaconcount;
|
|
|
|
short chan;
|
|
short sens;
|
|
short max_sens;
|
|
u32 rx_prevlen;
|
|
|
|
u8 ScanDelay;
|
|
bool ps_force;
|
|
|
|
u32 irq_mask[2];
|
|
|
|
u8 Rf_Mode;
|
|
nic_t card_8192;
|
|
u8 card_8192_version;
|
|
|
|
short enable_gpio0;
|
|
|
|
u8 rf_type;
|
|
u8 IC_Cut;
|
|
char nick[IW_ESSID_MAX_SIZE + 1];
|
|
|
|
u8 RegBcnCtrlVal;
|
|
bool bHwAntDiv;
|
|
|
|
bool bTKIPinNmodeFromReg;
|
|
bool bWEPinNmodeFromReg;
|
|
|
|
bool bLedOpenDrain;
|
|
|
|
u8 check_roaming_cnt;
|
|
|
|
bool bIgnoreSilentReset;
|
|
u32 SilentResetRxSoltNum;
|
|
u32 SilentResetRxSlotIndex;
|
|
u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
|
|
|
|
void *scan_cmd;
|
|
u8 hwscan_bw_40;
|
|
|
|
u16 nrxAMPDU_size;
|
|
u8 nrxAMPDU_aggr_num;
|
|
|
|
u32 last_rxdesc_tsf_high;
|
|
u32 last_rxdesc_tsf_low;
|
|
|
|
|
|
u16 basic_rate;
|
|
u8 short_preamble;
|
|
u8 dot11CurrentPreambleMode;
|
|
u8 slot_time;
|
|
u16 SifsTime;
|
|
|
|
u8 RegWirelessMode;
|
|
|
|
u8 firmware_version;
|
|
u16 FirmwareSubVersion;
|
|
u16 rf_pathmap;
|
|
bool AutoloadFailFlag;
|
|
|
|
u8 RegPciASPM;
|
|
u8 RegAMDPciASPM;
|
|
u8 RegHwSwRfOffD3;
|
|
u8 RegSupportPciASPM;
|
|
bool bSupportASPM;
|
|
|
|
u32 RfRegChnlVal[2];
|
|
|
|
u8 ShowRateMode;
|
|
u8 RATRTableBitmap;
|
|
|
|
u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
|
|
u16 EfuseUsedBytes;
|
|
u8 EfuseUsedPercentage;
|
|
|
|
short epromtype;
|
|
u16 eeprom_vid;
|
|
u16 eeprom_did;
|
|
u16 eeprom_svid;
|
|
u16 eeprom_smid;
|
|
u8 eeprom_CustomerID;
|
|
u16 eeprom_ChannelPlan;
|
|
u8 eeprom_version;
|
|
|
|
u8 EEPROMRegulatory;
|
|
u8 EEPROMPwrGroup[2][3];
|
|
u8 EEPROMOptional;
|
|
|
|
u8 EEPROMTxPowerLevelCCK[14];
|
|
u8 EEPROMTxPowerLevelOFDM24G[14];
|
|
u8 EEPROMTxPowerLevelOFDM5G[24];
|
|
u8 EEPROMRfACCKChnl1TxPwLevel[3];
|
|
u8 EEPROMRfAOfdmChnlTxPwLevel[3];
|
|
u8 EEPROMRfCCCKChnl1TxPwLevel[3];
|
|
u8 EEPROMRfCOfdmChnlTxPwLevel[3];
|
|
u16 EEPROMTxPowerDiff;
|
|
u16 EEPROMAntPwDiff;
|
|
u8 EEPROMThermalMeter;
|
|
u8 EEPROMPwDiff;
|
|
u8 EEPROMCrystalCap;
|
|
|
|
u8 EEPROMBluetoothCoexist;
|
|
u8 EEPROMBluetoothType;
|
|
u8 EEPROMBluetoothAntNum;
|
|
u8 EEPROMBluetoothAntIsolation;
|
|
u8 EEPROMBluetoothRadioShared;
|
|
|
|
|
|
u8 EEPROMSupportWoWLAN;
|
|
u8 EEPROMBoardType;
|
|
u8 EEPROM_Def_Ver;
|
|
u8 EEPROMHT2T_TxPwr[6];
|
|
u8 EEPROMTSSI_A;
|
|
u8 EEPROMTSSI_B;
|
|
u8 EEPROMTxPowerLevelCCK_V1[3];
|
|
u8 EEPROMLegacyHTTxPowerDiff;
|
|
|
|
u8 BluetoothCoexist;
|
|
|
|
u8 CrystalCap;
|
|
u8 ThermalMeter[2];
|
|
|
|
u16 FwCmdIOMap;
|
|
u32 FwCmdIOParam;
|
|
|
|
u8 SwChnlInProgress;
|
|
u8 SwChnlStage;
|
|
u8 SwChnlStep;
|
|
u8 SetBWModeInProgress;
|
|
|
|
u8 nCur40MhzPrimeSC;
|
|
|
|
u32 RfReg0Value[4];
|
|
u8 NumTotalRFPath;
|
|
bool brfpath_rxenable[4];
|
|
|
|
bool bTXPowerDataReadFromEEPORM;
|
|
|
|
u16 RegChannelPlan;
|
|
u16 ChannelPlan;
|
|
bool bChnlPlanFromHW;
|
|
|
|
bool RegRfOff;
|
|
bool isRFOff;
|
|
bool bInPowerSaveMode;
|
|
u8 bHwRfOffAction;
|
|
|
|
bool aspm_clkreq_enable;
|
|
u32 pci_bridge_vendor;
|
|
u8 RegHostPciASPMSetting;
|
|
u8 RegDevicePciASPMSetting;
|
|
|
|
bool RFChangeInProgress;
|
|
bool SetRFPowerStateInProgress;
|
|
bool bdisable_nic;
|
|
|
|
u8 pwrGroupCnt;
|
|
|
|
u8 ThermalValue_LCK;
|
|
u8 ThermalValue_IQK;
|
|
bool bRfPiEnable;
|
|
|
|
u32 APKoutput[2][2];
|
|
bool bAPKdone;
|
|
|
|
long RegE94;
|
|
long RegE9C;
|
|
long RegEB4;
|
|
long RegEBC;
|
|
|
|
u32 RegC04;
|
|
u32 Reg874;
|
|
u32 RegC08;
|
|
u32 ADDA_backup[16];
|
|
u32 IQK_MAC_backup[3];
|
|
|
|
bool SetFwCmdInProgress;
|
|
u8 CurrentFwCmdIO;
|
|
|
|
u8 rssi_level;
|
|
|
|
bool bInformFWDriverControlDM;
|
|
u8 PwrGroupHT20[2][14];
|
|
u8 PwrGroupHT40[2][14];
|
|
|
|
u8 ThermalValue;
|
|
long EntryMinUndecoratedSmoothedPWDB;
|
|
long EntryMaxUndecoratedSmoothedPWDB;
|
|
u8 DynamicTxHighPowerLvl;
|
|
u8 LastDTPLvl;
|
|
u32 CurrentRATR0;
|
|
FALSE_ALARM_STATISTICS FalseAlmCnt;
|
|
|
|
u8 DMFlag;
|
|
u8 DM_Type;
|
|
|
|
u8 CckPwEnl;
|
|
u16 TSSI_13dBm;
|
|
u32 Pwr_Track;
|
|
u8 CCKPresentAttentuation_20Mdefault;
|
|
u8 CCKPresentAttentuation_40Mdefault;
|
|
char CCKPresentAttentuation_difference;
|
|
char CCKPresentAttentuation;
|
|
u8 bCckHighPower;
|
|
long undecorated_smoothed_pwdb;
|
|
long undecorated_smoothed_cck_adc_pwdb[4];
|
|
|
|
u32 MCSTxPowerLevelOriginalOffset[6];
|
|
u32 CCKTxPowerLevelOriginalOffset;
|
|
u8 TxPowerLevelCCK[14];
|
|
u8 TxPowerLevelCCK_A[14];
|
|
u8 TxPowerLevelCCK_C[14];
|
|
u8 TxPowerLevelOFDM24G[14];
|
|
u8 TxPowerLevelOFDM5G[14];
|
|
u8 TxPowerLevelOFDM24G_A[14];
|
|
u8 TxPowerLevelOFDM24G_C[14];
|
|
u8 LegacyHTTxPowerDiff;
|
|
u8 TxPowerDiff;
|
|
s8 RF_C_TxPwDiff;
|
|
s8 RF_B_TxPwDiff;
|
|
u8 RfTxPwrLevelCck[2][14];
|
|
u8 RfTxPwrLevelOfdm1T[2][14];
|
|
u8 RfTxPwrLevelOfdm2T[2][14];
|
|
u8 AntennaTxPwDiff[3];
|
|
u8 TxPwrHt20Diff[2][14];
|
|
u8 TxPwrLegacyHtDiff[2][14];
|
|
u8 TxPwrSafetyFlag;
|
|
u8 HT2T_TxPwr_A[14];
|
|
u8 HT2T_TxPwr_B[14];
|
|
u8 CurrentCckTxPwrIdx;
|
|
u8 CurrentOfdm24GTxPwrIdx;
|
|
|
|
bool bdynamic_txpower;
|
|
bool bDynamicTxHighPower;
|
|
bool bDynamicTxLowPower;
|
|
bool bLastDTPFlag_High;
|
|
bool bLastDTPFlag_Low;
|
|
|
|
bool bstore_last_dtpflag;
|
|
bool bstart_txctrl_bydtp;
|
|
|
|
u8 rfa_txpowertrackingindex;
|
|
u8 rfa_txpowertrackingindex_real;
|
|
u8 rfa_txpowertracking_default;
|
|
u8 rfc_txpowertrackingindex;
|
|
u8 rfc_txpowertrackingindex_real;
|
|
u8 rfc_txpowertracking_default;
|
|
bool btxpower_tracking;
|
|
bool bcck_in_ch14;
|
|
|
|
u8 TxPowerTrackControl;
|
|
u8 txpower_count;
|
|
bool btxpower_trackingInit;
|
|
|
|
u8 OFDM_index[2];
|
|
u8 CCK_index;
|
|
|
|
u8 Record_CCK_20Mindex;
|
|
u8 Record_CCK_40Mindex;
|
|
|
|
init_gain initgain_backup;
|
|
u8 DefaultInitialGain[4];
|
|
bool bis_any_nonbepkts;
|
|
bool bcurrent_turbo_EDCA;
|
|
bool bis_cur_rdlstate;
|
|
|
|
bool bCCKinCH14;
|
|
|
|
u8 MidHighPwrTHR_L1;
|
|
u8 MidHighPwrTHR_L2;
|
|
|
|
bool bfsync_processing;
|
|
u32 rate_record;
|
|
u32 rateCountDiffRecord;
|
|
u32 ContiuneDiffCount;
|
|
bool bswitch_fsync;
|
|
u8 framesync;
|
|
u32 framesyncC34;
|
|
u8 framesyncMonitor;
|
|
|
|
bool bDMInitialGainEnable;
|
|
bool MutualAuthenticationFail;
|
|
|
|
bool bDisableFrameBursting;
|
|
|
|
u32 reset_count;
|
|
bool bpbc_pressed;
|
|
|
|
u32 txpower_checkcnt;
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u32 txpower_tracking_callback_cnt;
|
|
u8 thermal_read_val[40];
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u8 thermal_readback_index;
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|
u32 ccktxpower_adjustcnt_not_ch14;
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|
u32 ccktxpower_adjustcnt_ch14;
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|
|
|
RESET_TYPE ResetProgress;
|
|
bool bForcedSilentReset;
|
|
bool bDisableNormalResetCheck;
|
|
u16 TxCounter;
|
|
u16 RxCounter;
|
|
int IrpPendingCount;
|
|
bool bResetInProgress;
|
|
bool force_reset;
|
|
bool force_lps;
|
|
u8 InitialGainOperateType;
|
|
|
|
bool chan_forced;
|
|
bool bSingleCarrier;
|
|
bool RegBoard;
|
|
bool bCckContTx;
|
|
bool bOfdmContTx;
|
|
bool bStartContTx;
|
|
u8 RegPaModel;
|
|
u8 btMpCckTxPower;
|
|
u8 btMpOfdmTxPower;
|
|
|
|
u32 MptActType;
|
|
u32 MptIoOffset;
|
|
u32 MptIoValue;
|
|
u32 MptRfPath;
|
|
|
|
u32 MptBandWidth;
|
|
u32 MptRateIndex;
|
|
u8 MptChannelToSw;
|
|
u32 MptRCR;
|
|
|
|
u8 PwrDomainProtect;
|
|
u8 H2CTxCmdSeq;
|
|
|
|
|
|
}r8192_priv;
|
|
|
|
extern const struct ethtool_ops rtl819x_ethtool_ops;
|
|
|
|
void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb);
|
|
short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
|
|
|
|
u8 read_nic_io_byte(struct net_device *dev, int x);
|
|
u32 read_nic_io_dword(struct net_device *dev, int x);
|
|
u16 read_nic_io_word(struct net_device *dev, int x) ;
|
|
void write_nic_io_byte(struct net_device *dev, int x,u8 y);
|
|
void write_nic_io_word(struct net_device *dev, int x,u16 y);
|
|
void write_nic_io_dword(struct net_device *dev, int x,u32 y);
|
|
|
|
u8 read_nic_byte(struct net_device *dev, int x);
|
|
u32 read_nic_dword(struct net_device *dev, int x);
|
|
u16 read_nic_word(struct net_device *dev, int x) ;
|
|
void write_nic_byte(struct net_device *dev, int x,u8 y);
|
|
void write_nic_word(struct net_device *dev, int x,u16 y);
|
|
void write_nic_dword(struct net_device *dev, int x,u32 y);
|
|
|
|
void force_pci_posting(struct net_device *dev);
|
|
|
|
void rtl8192_rx_enable(struct net_device *);
|
|
void rtl8192_tx_enable(struct net_device *);
|
|
|
|
int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev);
|
|
void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate);
|
|
void rtl8192_data_hard_stop(struct net_device *dev);
|
|
void rtl8192_data_hard_resume(struct net_device *dev);
|
|
void rtl8192_restart(void *data);
|
|
void rtl819x_watchdog_wqcallback(void *data);
|
|
void rtl8192_hw_sleep_wq (void *data);
|
|
void watch_dog_timer_callback(unsigned long data);
|
|
void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
|
|
void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
|
|
int rtl8192_down(struct net_device *dev,bool shutdownrf);
|
|
int rtl8192_up(struct net_device *dev);
|
|
void rtl8192_commit(struct net_device *dev);
|
|
void rtl8192_set_chan(struct net_device *dev,short ch);
|
|
|
|
void check_rfctrl_gpio_timer(unsigned long data);
|
|
|
|
void rtl8192_hw_wakeup_wq(void *data);
|
|
irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
|
|
|
|
short rtl8192_pci_initdescring(struct net_device *dev);
|
|
|
|
void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
|
|
|
|
int _rtl8192_up(struct net_device *dev,bool is_silent_reset);
|
|
|
|
short rtl8192_is_tx_queue_empty(struct net_device *dev);
|
|
void rtl8192_irq_disable(struct net_device *dev);
|
|
|
|
void rtl8192_tx_timeout(struct net_device *dev);
|
|
void rtl8192_pci_resetdescring(struct net_device *dev);
|
|
void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode);
|
|
void rtl8192_irq_enable(struct net_device *dev);
|
|
void rtl8192_config_rate(struct net_device* dev, u16* rate_config);
|
|
void rtl8192_update_cap(struct net_device* dev, u16 cap);
|
|
void rtl8192_irq_disable(struct net_device *dev);
|
|
|
|
void rtl819x_UpdateRxPktTimeStamp (struct net_device *dev, struct rtllib_rx_stats *stats);
|
|
long rtl819x_translate_todbm(struct r8192_priv * priv, u8 signal_strength_index );
|
|
void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
|
|
u8 rtl819x_evm_dbtopercentage(char value);
|
|
void rtl819x_process_cck_rxpathsel(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
|
|
u8 rtl819x_query_rxpwrpercentage( char antpower );
|
|
void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats * psrc_stats,struct rtllib_rx_stats * ptarget_stats);
|
|
|
|
bool NicIFEnableNIC(struct net_device* dev);
|
|
bool NicIFDisableNIC(struct net_device* dev);
|
|
|
|
bool
|
|
MgntActSet_RF_State(
|
|
struct net_device* dev,
|
|
RT_RF_POWER_STATE StateToSet,
|
|
RT_RF_CHANGE_SOURCE ChangeSource,
|
|
bool ProtectOrNot
|
|
);
|
|
void
|
|
ActUpdateChannelAccessSetting(
|
|
struct net_device* dev,
|
|
WIRELESS_MODE WirelessMode,
|
|
PCHANNEL_ACCESS_SETTING ChnlAccessSetting
|
|
);
|
|
|
|
#endif
|