Improve EP93xx I2S clocks management.
Some freqs values are set not exact as they requested for MCLK and
original code was not able to find divisors for SCLK and LRCLK.
This code just picks up nearest value from 3 possible variants.
This patch makes 44100 and 192000 rates working and fixes
capture function (by selecting SCLK/LRCLK=64 where possible).
All other rates should work as before.
Signed-off-by: Alexander Sverdlin <subaparts@yandex.ru>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
5cbf7e49de