59db96913c
Rather than open coding the enable GPIO control in the MFD core use the API to push the management on to the regulator driver. The immediate advantage is slight for most systems but this will in future allow device configurations where an external regulator is used for DCVDD. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
532 lines
14 KiB
C
532 lines
14 KiB
C
/*
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* Arizona core driver
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*
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* Copyright 2012 Wolfson Microelectronics plc
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/gpio.h>
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#include <linux/interrupt.h>
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#include <linux/mfd/core.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <linux/mfd/arizona/core.h>
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#include <linux/mfd/arizona/registers.h>
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#include "arizona.h"
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static const char *wm5102_core_supplies[] = {
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"AVDD",
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"DBVDD1",
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};
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int arizona_clk32k_enable(struct arizona *arizona)
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{
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int ret = 0;
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mutex_lock(&arizona->clk_lock);
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arizona->clk32k_ref++;
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if (arizona->clk32k_ref == 1)
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ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
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ARIZONA_CLK_32K_ENA,
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ARIZONA_CLK_32K_ENA);
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if (ret != 0)
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arizona->clk32k_ref--;
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mutex_unlock(&arizona->clk_lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
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int arizona_clk32k_disable(struct arizona *arizona)
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{
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int ret = 0;
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mutex_lock(&arizona->clk_lock);
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BUG_ON(arizona->clk32k_ref <= 0);
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arizona->clk32k_ref--;
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if (arizona->clk32k_ref == 0)
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regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
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ARIZONA_CLK_32K_ENA, 0);
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mutex_unlock(&arizona->clk_lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
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static irqreturn_t arizona_clkgen_err(int irq, void *data)
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{
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struct arizona *arizona = data;
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dev_err(arizona->dev, "CLKGEN error\n");
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return IRQ_HANDLED;
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}
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static irqreturn_t arizona_underclocked(int irq, void *data)
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{
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struct arizona *arizona = data;
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unsigned int val;
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int ret;
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ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
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&val);
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if (ret != 0) {
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dev_err(arizona->dev, "Failed to read underclock status: %d\n",
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ret);
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return IRQ_NONE;
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}
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if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
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dev_err(arizona->dev, "AIF3 underclocked\n");
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if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
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dev_err(arizona->dev, "AIF3 underclocked\n");
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if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
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dev_err(arizona->dev, "AIF1 underclocked\n");
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if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
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dev_err(arizona->dev, "ISRC2 underclocked\n");
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if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
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dev_err(arizona->dev, "ISRC1 underclocked\n");
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if (val & ARIZONA_FX_UNDERCLOCKED_STS)
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dev_err(arizona->dev, "FX underclocked\n");
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if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
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dev_err(arizona->dev, "ASRC underclocked\n");
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if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
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dev_err(arizona->dev, "DAC underclocked\n");
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if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
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dev_err(arizona->dev, "ADC underclocked\n");
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if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
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dev_err(arizona->dev, "Mixer underclocked\n");
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return IRQ_HANDLED;
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}
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static irqreturn_t arizona_overclocked(int irq, void *data)
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{
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struct arizona *arizona = data;
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unsigned int val[2];
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int ret;
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ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
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&val[0], 2);
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if (ret != 0) {
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dev_err(arizona->dev, "Failed to read overclock status: %d\n",
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ret);
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return IRQ_NONE;
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}
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if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
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dev_err(arizona->dev, "PWM overclocked\n");
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if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
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dev_err(arizona->dev, "FX core overclocked\n");
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if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
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dev_err(arizona->dev, "DAC SYS overclocked\n");
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if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
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dev_err(arizona->dev, "DAC WARP overclocked\n");
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if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
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dev_err(arizona->dev, "ADC overclocked\n");
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if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
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dev_err(arizona->dev, "Mixer overclocked\n");
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if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
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dev_err(arizona->dev, "AIF3 overclocked\n");
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if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
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dev_err(arizona->dev, "AIF2 overclocked\n");
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if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
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dev_err(arizona->dev, "AIF1 overclocked\n");
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if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
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dev_err(arizona->dev, "Pad control overclocked\n");
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if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
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dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
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if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
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dev_err(arizona->dev, "Slimbus async overclocked\n");
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if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
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dev_err(arizona->dev, "Slimbus sync overclocked\n");
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if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
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dev_err(arizona->dev, "ASRC async system overclocked\n");
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if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
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dev_err(arizona->dev, "ASRC async WARP overclocked\n");
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if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
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dev_err(arizona->dev, "ASRC sync system overclocked\n");
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if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
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dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
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if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
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dev_err(arizona->dev, "DSP1 overclocked\n");
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if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
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dev_err(arizona->dev, "ISRC2 overclocked\n");
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if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
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dev_err(arizona->dev, "ISRC1 overclocked\n");
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return IRQ_HANDLED;
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}
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static int arizona_wait_for_boot(struct arizona *arizona)
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{
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unsigned int reg;
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int ret, i;
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/*
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* We can't use an interrupt as we need to runtime resume to do so,
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* we won't race with the interrupt handler as it'll be blocked on
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* runtime resume.
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*/
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for (i = 0; i < 5; i++) {
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msleep(1);
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ret = regmap_read(arizona->regmap,
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ARIZONA_INTERRUPT_RAW_STATUS_5, ®);
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if (ret != 0) {
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dev_err(arizona->dev, "Failed to read boot state: %d\n",
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ret);
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return ret;
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}
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if (reg & ARIZONA_BOOT_DONE_STS)
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break;
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}
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if (reg & ARIZONA_BOOT_DONE_STS) {
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regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
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ARIZONA_BOOT_DONE_STS);
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} else {
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dev_err(arizona->dev, "Device boot timed out: %x\n", reg);
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return -ETIMEDOUT;
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}
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pm_runtime_mark_last_busy(arizona->dev);
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return 0;
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}
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#ifdef CONFIG_PM_RUNTIME
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static int arizona_runtime_resume(struct device *dev)
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{
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struct arizona *arizona = dev_get_drvdata(dev);
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int ret;
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ret = regulator_enable(arizona->dcvdd);
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if (ret != 0) {
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dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
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return ret;
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}
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regcache_cache_only(arizona->regmap, false);
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ret = arizona_wait_for_boot(arizona);
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if (ret != 0)
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return ret;
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regcache_sync(arizona->regmap);
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return 0;
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}
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static int arizona_runtime_suspend(struct device *dev)
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{
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struct arizona *arizona = dev_get_drvdata(dev);
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regulator_disable(arizona->dcvdd);
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regcache_cache_only(arizona->regmap, true);
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regcache_mark_dirty(arizona->regmap);
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return 0;
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}
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#endif
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const struct dev_pm_ops arizona_pm_ops = {
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SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
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arizona_runtime_resume,
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NULL)
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};
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EXPORT_SYMBOL_GPL(arizona_pm_ops);
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static struct mfd_cell early_devs[] = {
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{ .name = "arizona-ldo1" },
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};
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static struct mfd_cell wm5102_devs[] = {
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{ .name = "arizona-extcon" },
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{ .name = "arizona-gpio" },
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{ .name = "arizona-micsupp" },
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{ .name = "arizona-pwm" },
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{ .name = "wm5102-codec" },
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};
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int __devinit arizona_dev_init(struct arizona *arizona)
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{
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struct device *dev = arizona->dev;
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const char *type_name;
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unsigned int reg, val;
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int ret, i;
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dev_set_drvdata(arizona->dev, arizona);
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mutex_init(&arizona->clk_lock);
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if (dev_get_platdata(arizona->dev))
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memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
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sizeof(arizona->pdata));
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regcache_cache_only(arizona->regmap, true);
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switch (arizona->type) {
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case WM5102:
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for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
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arizona->core_supplies[i].supply
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= wm5102_core_supplies[i];
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arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
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break;
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default:
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dev_err(arizona->dev, "Unknown device type %d\n",
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arizona->type);
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return -EINVAL;
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}
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ret = mfd_add_devices(arizona->dev, -1, early_devs,
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ARRAY_SIZE(early_devs), NULL, 0);
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if (ret != 0) {
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dev_err(dev, "Failed to add early children: %d\n", ret);
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return ret;
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}
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ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
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arizona->core_supplies);
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if (ret != 0) {
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dev_err(dev, "Failed to request core supplies: %d\n",
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ret);
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goto err_early;
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}
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arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
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if (IS_ERR(arizona->dcvdd)) {
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ret = PTR_ERR(arizona->dcvdd);
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dev_err(dev, "Failed to request DCVDD: %d\n", ret);
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goto err_early;
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}
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ret = regulator_bulk_enable(arizona->num_core_supplies,
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arizona->core_supplies);
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if (ret != 0) {
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dev_err(dev, "Failed to enable core supplies: %d\n",
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ret);
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goto err_early;
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}
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ret = regulator_enable(arizona->dcvdd);
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if (ret != 0) {
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dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
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goto err_enable;
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}
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if (arizona->pdata.reset) {
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/* Start out with /RESET low to put the chip into reset */
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ret = gpio_request_one(arizona->pdata.reset,
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GPIOF_DIR_OUT | GPIOF_INIT_LOW,
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"arizona /RESET");
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if (ret != 0) {
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dev_err(dev, "Failed to request /RESET: %d\n", ret);
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goto err_dcvdd;
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}
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gpio_set_value_cansleep(arizona->pdata.reset, 1);
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}
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regcache_cache_only(arizona->regmap, false);
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ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®);
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if (ret != 0) {
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dev_err(dev, "Failed to read ID register: %d\n", ret);
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goto err_reset;
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}
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ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
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&arizona->rev);
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if (ret != 0) {
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dev_err(dev, "Failed to read revision register: %d\n", ret);
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goto err_reset;
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}
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arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
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switch (reg) {
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case 0x5102:
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type_name = "WM5102";
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if (arizona->type != WM5102) {
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dev_err(arizona->dev, "WM5102 registered as %d\n",
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arizona->type);
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arizona->type = WM5102;
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}
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ret = wm5102_patch(arizona);
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break;
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default:
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dev_err(arizona->dev, "Unknown device ID %x\n", reg);
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goto err_reset;
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}
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dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
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if (ret != 0)
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dev_err(arizona->dev, "Failed to apply patch: %d\n", ret);
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/* If we have a /RESET GPIO we'll already be reset */
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if (!arizona->pdata.reset) {
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ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
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if (ret != 0) {
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dev_err(dev, "Failed to reset device: %d\n", ret);
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goto err_reset;
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}
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}
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arizona_wait_for_boot(arizona);
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for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
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if (!arizona->pdata.gpio_defaults[i])
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continue;
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regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
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arizona->pdata.gpio_defaults[i]);
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}
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pm_runtime_set_autosuspend_delay(arizona->dev, 100);
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pm_runtime_use_autosuspend(arizona->dev);
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pm_runtime_enable(arizona->dev);
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/* Chip default */
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if (!arizona->pdata.clk32k_src)
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arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
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switch (arizona->pdata.clk32k_src) {
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case ARIZONA_32KZ_MCLK1:
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case ARIZONA_32KZ_MCLK2:
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regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
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ARIZONA_CLK_32K_SRC_MASK,
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arizona->pdata.clk32k_src - 1);
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break;
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case ARIZONA_32KZ_NONE:
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regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
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ARIZONA_CLK_32K_SRC_MASK, 2);
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break;
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default:
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dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
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arizona->pdata.clk32k_src);
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ret = -EINVAL;
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goto err_reset;
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}
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for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
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/* Default for both is 0 so noop with defaults */
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val = arizona->pdata.dmic_ref[i]
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<< ARIZONA_IN1_DMIC_SUP_SHIFT;
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val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
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regmap_update_bits(arizona->regmap,
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ARIZONA_IN1L_CONTROL + (i * 8),
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ARIZONA_IN1_DMIC_SUP_MASK |
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ARIZONA_IN1_MODE_MASK, val);
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}
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for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
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/* Default is 0 so noop with defaults */
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if (arizona->pdata.out_mono[i])
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val = ARIZONA_OUT1_MONO;
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else
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val = 0;
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regmap_update_bits(arizona->regmap,
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ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
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ARIZONA_OUT1_MONO, val);
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}
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BUILD_BUG_ON(ARIZONA_MAX_PDM_SPK > 1);
|
|
for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
|
|
if (arizona->pdata.spk_mute[i])
|
|
regmap_update_bits(arizona->regmap,
|
|
ARIZONA_PDM_SPK1_CTRL_1,
|
|
ARIZONA_SPK1_MUTE_ENDIAN_MASK |
|
|
ARIZONA_SPK1_MUTE_SEQ1_MASK,
|
|
arizona->pdata.spk_mute[i]);
|
|
|
|
if (arizona->pdata.spk_fmt[i])
|
|
regmap_update_bits(arizona->regmap,
|
|
ARIZONA_PDM_SPK1_CTRL_2,
|
|
ARIZONA_SPK1_FMT_MASK,
|
|
arizona->pdata.spk_fmt[i]);
|
|
}
|
|
|
|
/* Set up for interrupts */
|
|
ret = arizona_irq_init(arizona);
|
|
if (ret != 0)
|
|
goto err_reset;
|
|
|
|
arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
|
|
arizona_clkgen_err, arizona);
|
|
arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
|
|
arizona_overclocked, arizona);
|
|
arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
|
|
arizona_underclocked, arizona);
|
|
|
|
switch (arizona->type) {
|
|
case WM5102:
|
|
ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
|
|
ARRAY_SIZE(wm5102_devs), NULL, 0);
|
|
break;
|
|
}
|
|
|
|
if (ret != 0) {
|
|
dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
|
|
goto err_irq;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_RUNTIME
|
|
regulator_disable(arizona->dcvdd);
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
err_irq:
|
|
arizona_irq_exit(arizona);
|
|
err_reset:
|
|
if (arizona->pdata.reset) {
|
|
gpio_set_value_cansleep(arizona->pdata.reset, 1);
|
|
gpio_free(arizona->pdata.reset);
|
|
}
|
|
err_dcvdd:
|
|
regulator_disable(arizona->dcvdd);
|
|
err_enable:
|
|
regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies),
|
|
arizona->core_supplies);
|
|
err_early:
|
|
mfd_remove_devices(dev);
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(arizona_dev_init);
|
|
|
|
int __devexit arizona_dev_exit(struct arizona *arizona)
|
|
{
|
|
mfd_remove_devices(arizona->dev);
|
|
arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
|
|
arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
|
|
arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
|
|
pm_runtime_disable(arizona->dev);
|
|
arizona_irq_exit(arizona);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(arizona_dev_exit);
|