Pratyush Anand 58a0f23fdd USB: DWC3: Issue device soft reset before core soft reset ... Synopsys specification clearly states under section "Device Power-On or Soft Reset" that DCTL.CSftRst=1 should be first step. So, just follow what specification says. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>		2012-06-22 13:22:46 +03:00
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Kconfig	usb: dwc3: Fix the dwc3 dependency	2012-05-11 15:17:31 -07:00
Makefile	usb: dwc3: Add Exynos Specific Glue layer	2012-03-02 12:11:28 +02:00
core.c	USB: DWC3: Issue device soft reset before core soft reset	2012-06-22 13:22:46 +03:00
core.h	usb: dwc3: Correct DWC3_DCTL_HIRD_THRES definition	2012-06-06 16:56:10 +03:00
debug.h	usb: dwc: remove "All rights reserved" statement.	2011-10-04 10:25:52 -07:00
debugfs.c	usb: dwc3: debugfs: fix off by one when entering testmode	2012-02-10 12:14:53 +02:00
dwc3-exynos.c	usb: dwc3: Remove duplicate header file inclusion	2012-06-22 13:21:43 +03:00
dwc3-omap.c	usb: dwc3: omap: add dwc3_omap_readl/writel functions	2012-04-24 15:37:01 +03:00
dwc3-pci.c	USB merge for 3.4-rc1	2012-03-20 11:26:30 -07:00
ep0.c	usb: dwc3: ep0: rename dwc3_ep0_complete_req to dwc3_ep0_complete_status	2012-06-03 23:08:28 +03:00
gadget.c	usb: dwc3: giveback all queued request when ep disabled or reset received	2012-06-15 14:43:44 +03:00
gadget.h	usb: dwc3: add definitions for new registers	2012-06-03 23:08:21 +03:00
host.c	usb: dwc3: core: split host address space	2012-04-24 15:37:04 +03:00
io.h	usb: dwc3: core: split host address space	2012-04-24 15:37:04 +03:00