01d69a82e1
These have been broken (returning "int") since the dawn of
time. But there were no users that needed the whole value
until commit
424acaaeb3
rwsem: wake queued readers when writer blocks on active read lock
made this change:
- (rwsem_atomic_update(0, sem) & RWSEM_ACTIVE_MASK))
- /* Someone grabbed the sem already */
+ rwsem_atomic_update(0, sem) < RWSEM_WAITING_BIAS)
+ /* Someone grabbed the sem for write already */
RWSEM_ACTIVE_MASK is 0xffffffffL, so the old code only looked
at the low order 32-bits. The new code needs to see all 64 bits.
Signed-off-by: Tony Luck <tony.luck@intel.com>
220 lines
6.1 KiB
C
220 lines
6.1 KiB
C
#ifndef _ASM_IA64_ATOMIC_H
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#define _ASM_IA64_ATOMIC_H
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*
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* NOTE: don't mess with the types below! The "unsigned long" and
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* "int" types were carefully placed so as to ensure proper operation
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* of the macros.
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*
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* Copyright (C) 1998, 1999, 2002-2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <linux/types.h>
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#include <asm/intrinsics.h>
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#include <asm/system.h>
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#define ATOMIC_INIT(i) ((atomic_t) { (i) })
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#define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
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#define atomic_read(v) (*(volatile int *)&(v)->counter)
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#define atomic64_read(v) (*(volatile long *)&(v)->counter)
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#define atomic_set(v,i) (((v)->counter) = (i))
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#define atomic64_set(v,i) (((v)->counter) = (i))
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static __inline__ int
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ia64_atomic_add (int i, atomic_t *v)
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{
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__s32 old, new;
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CMPXCHG_BUGCHECK_DECL
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do {
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CMPXCHG_BUGCHECK(v);
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old = atomic_read(v);
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new = old + i;
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} while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old);
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return new;
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}
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static __inline__ long
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ia64_atomic64_add (__s64 i, atomic64_t *v)
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{
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__s64 old, new;
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CMPXCHG_BUGCHECK_DECL
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do {
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CMPXCHG_BUGCHECK(v);
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old = atomic64_read(v);
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new = old + i;
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} while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old);
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return new;
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}
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static __inline__ int
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ia64_atomic_sub (int i, atomic_t *v)
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{
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__s32 old, new;
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CMPXCHG_BUGCHECK_DECL
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do {
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CMPXCHG_BUGCHECK(v);
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old = atomic_read(v);
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new = old - i;
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} while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old);
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return new;
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}
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static __inline__ long
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ia64_atomic64_sub (__s64 i, atomic64_t *v)
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{
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__s64 old, new;
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CMPXCHG_BUGCHECK_DECL
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do {
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CMPXCHG_BUGCHECK(v);
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old = atomic64_read(v);
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new = old - i;
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} while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old);
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return new;
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}
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#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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#define atomic64_cmpxchg(v, old, new) \
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(cmpxchg(&((v)->counter), old, new))
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#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
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static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
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{
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int c, old;
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c = atomic_read(v);
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for (;;) {
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if (unlikely(c == (u)))
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break;
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old = atomic_cmpxchg((v), c, c + (a));
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if (likely(old == c))
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break;
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c = old;
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}
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return c != (u);
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}
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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static __inline__ long atomic64_add_unless(atomic64_t *v, long a, long u)
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{
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long c, old;
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c = atomic64_read(v);
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for (;;) {
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if (unlikely(c == (u)))
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break;
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old = atomic64_cmpxchg((v), c, c + (a));
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if (likely(old == c))
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break;
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c = old;
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}
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return c != (u);
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}
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#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
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#define atomic_add_return(i,v) \
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({ \
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int __ia64_aar_i = (i); \
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(__builtin_constant_p(i) \
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&& ( (__ia64_aar_i == 1) || (__ia64_aar_i == 4) \
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|| (__ia64_aar_i == 8) || (__ia64_aar_i == 16) \
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|| (__ia64_aar_i == -1) || (__ia64_aar_i == -4) \
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|| (__ia64_aar_i == -8) || (__ia64_aar_i == -16))) \
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? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \
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: ia64_atomic_add(__ia64_aar_i, v); \
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})
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#define atomic64_add_return(i,v) \
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({ \
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long __ia64_aar_i = (i); \
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(__builtin_constant_p(i) \
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&& ( (__ia64_aar_i == 1) || (__ia64_aar_i == 4) \
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|| (__ia64_aar_i == 8) || (__ia64_aar_i == 16) \
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|| (__ia64_aar_i == -1) || (__ia64_aar_i == -4) \
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|| (__ia64_aar_i == -8) || (__ia64_aar_i == -16))) \
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? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \
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: ia64_atomic64_add(__ia64_aar_i, v); \
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})
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/*
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* Atomically add I to V and return TRUE if the resulting value is
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* negative.
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*/
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static __inline__ int
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atomic_add_negative (int i, atomic_t *v)
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{
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return atomic_add_return(i, v) < 0;
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}
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static __inline__ long
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atomic64_add_negative (__s64 i, atomic64_t *v)
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{
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return atomic64_add_return(i, v) < 0;
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}
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#define atomic_sub_return(i,v) \
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({ \
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int __ia64_asr_i = (i); \
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(__builtin_constant_p(i) \
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&& ( (__ia64_asr_i == 1) || (__ia64_asr_i == 4) \
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|| (__ia64_asr_i == 8) || (__ia64_asr_i == 16) \
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|| (__ia64_asr_i == -1) || (__ia64_asr_i == -4) \
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|| (__ia64_asr_i == -8) || (__ia64_asr_i == -16))) \
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? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \
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: ia64_atomic_sub(__ia64_asr_i, v); \
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})
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#define atomic64_sub_return(i,v) \
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({ \
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long __ia64_asr_i = (i); \
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(__builtin_constant_p(i) \
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&& ( (__ia64_asr_i == 1) || (__ia64_asr_i == 4) \
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|| (__ia64_asr_i == 8) || (__ia64_asr_i == 16) \
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|| (__ia64_asr_i == -1) || (__ia64_asr_i == -4) \
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|| (__ia64_asr_i == -8) || (__ia64_asr_i == -16))) \
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? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \
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: ia64_atomic64_sub(__ia64_asr_i, v); \
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})
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#define atomic_dec_return(v) atomic_sub_return(1, (v))
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#define atomic_inc_return(v) atomic_add_return(1, (v))
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#define atomic64_dec_return(v) atomic64_sub_return(1, (v))
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#define atomic64_inc_return(v) atomic64_add_return(1, (v))
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#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
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#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
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#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
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#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0)
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#define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0)
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#define atomic64_inc_and_test(v) (atomic64_add_return(1, (v)) == 0)
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#define atomic_add(i,v) atomic_add_return((i), (v))
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#define atomic_sub(i,v) atomic_sub_return((i), (v))
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#define atomic_inc(v) atomic_add(1, (v))
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#define atomic_dec(v) atomic_sub(1, (v))
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#define atomic64_add(i,v) atomic64_add_return((i), (v))
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#define atomic64_sub(i,v) atomic64_sub_return((i), (v))
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#define atomic64_inc(v) atomic64_add(1, (v))
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#define atomic64_dec(v) atomic64_sub(1, (v))
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/* Atomic operations are already serializing */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#include <asm-generic/atomic-long.h>
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#endif /* _ASM_IA64_ATOMIC_H */
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