a801cd6192
The original arch/arm/include/asm/hardware/vic.h was written for the PL190 ARM VIC implementation, and as such does not have any information about the PL192 version. Add details about the PL192 and PL190 specific registers and any changes between the two units. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
47 lines
1.6 KiB
C
47 lines
1.6 KiB
C
/*
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* arch/arm/include/asm/hardware/vic.h
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*
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* Copyright (c) ARM Limited 2003. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARM_HARDWARE_VIC_H
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#define __ASM_ARM_HARDWARE_VIC_H
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#define VIC_IRQ_STATUS 0x00
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#define VIC_FIQ_STATUS 0x04
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#define VIC_RAW_STATUS 0x08
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#define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */
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#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */
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#define VIC_INT_ENABLE_CLEAR 0x14
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#define VIC_INT_SOFT 0x18
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#define VIC_INT_SOFT_CLEAR 0x1c
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#define VIC_PROTECT 0x20
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#define VIC_PL190_VECT_ADDR 0x30 /* PL190 only */
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#define VIC_PL190_DEF_VECT_ADDR 0x34 /* PL190 only */
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#define VIC_VECT_ADDR0 0x100 /* 0 to 15 (0..31 PL192) */
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#define VIC_VECT_CNTL0 0x200 /* 0 to 15 (0..31 PL192) */
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#define VIC_ITCR 0x300 /* VIC test control register */
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#define VIC_VECT_CNTL_ENABLE (1 << 5)
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#define VIC_PL192_VECT_ADDR 0xF00
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#ifndef __ASSEMBLY__
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void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources);
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#endif
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#endif
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