0ac60acb54
Get the HVR-1255 analog support working for all supported inputs. This includes introduction of a new board profile for an OEM variant which doesn't have all the same inputs as the retail version of the board. Validated with the following boards: HVR-1255 (0070:2259) Thanks to Steven Toth and Hauppauge for loaning me various boards to regression test with. Thanks-to: Steven Toth <stoth@kernellabs.com> Signed-off-by: Devin Heitmueler <dheitmueller@kernellabs.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
1357 lines
36 KiB
C
1357 lines
36 KiB
C
/*
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* Driver for the Conexant CX23885 PCIe bridge
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*
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* Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/fs.h>
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#include <linux/kthread.h>
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#include <linux/file.h>
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#include <linux/suspend.h>
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#include "cx23885.h"
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#include <media/v4l2-common.h>
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#include "dvb_ca_en50221.h"
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#include "s5h1409.h"
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#include "s5h1411.h"
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#include "mt2131.h"
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#include "tda8290.h"
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#include "tda18271.h"
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#include "lgdt330x.h"
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#include "xc4000.h"
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#include "xc5000.h"
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#include "max2165.h"
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#include "tda10048.h"
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#include "tuner-xc2028.h"
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#include "tuner-simple.h"
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#include "dib7000p.h"
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#include "dibx000_common.h"
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#include "zl10353.h"
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#include "stv0900.h"
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#include "stv0900_reg.h"
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#include "stv6110.h"
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#include "lnbh24.h"
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#include "cx24116.h"
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#include "cimax2.h"
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#include "lgs8gxx.h"
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#include "netup-eeprom.h"
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#include "netup-init.h"
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#include "lgdt3305.h"
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#include "atbm8830.h"
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#include "ds3000.h"
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#include "cx23885-f300.h"
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#include "altera-ci.h"
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#include "stv0367.h"
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#include "drxk.h"
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#include "mt2063.h"
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static unsigned int debug;
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#define dprintk(level, fmt, arg...)\
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do { if (debug >= level)\
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printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
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} while (0)
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/* ------------------------------------------------------------------ */
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static unsigned int alt_tuner;
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module_param(alt_tuner, int, 0644);
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MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
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DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
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/* ------------------------------------------------------------------ */
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static int dvb_buf_setup(struct videobuf_queue *q,
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unsigned int *count, unsigned int *size)
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{
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struct cx23885_tsport *port = q->priv_data;
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port->ts_packet_size = 188 * 4;
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port->ts_packet_count = 32;
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*size = port->ts_packet_size * port->ts_packet_count;
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*count = 32;
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return 0;
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}
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static int dvb_buf_prepare(struct videobuf_queue *q,
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struct videobuf_buffer *vb, enum v4l2_field field)
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{
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struct cx23885_tsport *port = q->priv_data;
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return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
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}
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static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
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{
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struct cx23885_tsport *port = q->priv_data;
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cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
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}
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static void dvb_buf_release(struct videobuf_queue *q,
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struct videobuf_buffer *vb)
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{
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cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
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}
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static int cx23885_dvb_set_frontend(struct dvb_frontend *fe);
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static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
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{
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struct videobuf_dvb_frontends *f;
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struct videobuf_dvb_frontend *fe;
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f = &port->frontends;
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if (f->gate <= 1) /* undefined or fe0 */
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fe = videobuf_dvb_get_frontend(f, 1);
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else
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fe = videobuf_dvb_get_frontend(f, f->gate);
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if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
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fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
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/*
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* FIXME: Improve this path to avoid calling the
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* cx23885_dvb_set_frontend() every time it passes here.
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*/
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cx23885_dvb_set_frontend(fe->dvb.frontend);
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}
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static struct videobuf_queue_ops dvb_qops = {
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.buf_setup = dvb_buf_setup,
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.buf_prepare = dvb_buf_prepare,
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.buf_queue = dvb_buf_queue,
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.buf_release = dvb_buf_release,
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};
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static struct s5h1409_config hauppauge_generic_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_ON,
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.qam_if = 44000,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct tda10048_config hauppauge_hvr1200_config = {
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.demod_address = 0x10 >> 1,
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.output_mode = TDA10048_SERIAL_OUTPUT,
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.fwbulkwritelen = TDA10048_BULKWRITE_200,
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.inversion = TDA10048_INVERSION_ON,
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.dtv6_if_freq_khz = TDA10048_IF_3300,
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.dtv7_if_freq_khz = TDA10048_IF_3800,
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.dtv8_if_freq_khz = TDA10048_IF_4300,
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.clk_freq_khz = TDA10048_CLK_16000,
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};
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static struct tda10048_config hauppauge_hvr1210_config = {
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.demod_address = 0x10 >> 1,
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.output_mode = TDA10048_SERIAL_OUTPUT,
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.fwbulkwritelen = TDA10048_BULKWRITE_200,
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.inversion = TDA10048_INVERSION_ON,
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.dtv6_if_freq_khz = TDA10048_IF_3300,
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.dtv7_if_freq_khz = TDA10048_IF_3500,
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.dtv8_if_freq_khz = TDA10048_IF_4000,
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.clk_freq_khz = TDA10048_CLK_16000,
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};
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static struct s5h1409_config hauppauge_ezqam_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_OFF,
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.qam_if = 4000,
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.inversion = S5H1409_INVERSION_ON,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct s5h1409_config hauppauge_hvr1800lp_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_OFF,
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.qam_if = 44000,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct s5h1409_config hauppauge_hvr1500_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_OFF,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct mt2131_config hauppauge_generic_tunerconfig = {
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0x61
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};
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static struct lgdt330x_config fusionhdtv_5_express = {
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.demod_address = 0x0e,
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.demod_chip = LGDT3303,
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.serial_mpeg = 0x40,
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};
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static struct s5h1409_config hauppauge_hvr1500q_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_ON,
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.qam_if = 44000,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct s5h1409_config dvico_s5h1409_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_ON,
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.qam_if = 44000,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct s5h1411_config dvico_s5h1411_config = {
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.output_mode = S5H1411_SERIAL_OUTPUT,
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.gpio = S5H1411_GPIO_ON,
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.qam_if = S5H1411_IF_44000,
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.vsb_if = S5H1411_IF_44000,
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.inversion = S5H1411_INVERSION_OFF,
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.status_mode = S5H1411_DEMODLOCKING,
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.mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct s5h1411_config hcw_s5h1411_config = {
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.output_mode = S5H1411_SERIAL_OUTPUT,
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.gpio = S5H1411_GPIO_OFF,
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.vsb_if = S5H1411_IF_44000,
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.qam_if = S5H1411_IF_4000,
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.inversion = S5H1411_INVERSION_ON,
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.status_mode = S5H1411_DEMODLOCKING,
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.mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
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.i2c_address = 0x61,
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.if_khz = 5380,
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};
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static struct xc5000_config dvico_xc5000_tunerconfig = {
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.i2c_address = 0x64,
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.if_khz = 5380,
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};
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static struct tda829x_config tda829x_no_probe = {
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.probe_tuner = TDA829X_DONT_PROBE,
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};
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static struct tda18271_std_map hauppauge_tda18271_std_map = {
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.atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
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.if_lvl = 6, .rfagc_top = 0x37 },
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.qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
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.if_lvl = 6, .rfagc_top = 0x37 },
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};
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static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
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.dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
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.if_lvl = 1, .rfagc_top = 0x37, },
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.dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
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.if_lvl = 1, .rfagc_top = 0x37, },
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.dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
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.if_lvl = 1, .rfagc_top = 0x37, },
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};
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static struct tda18271_config hauppauge_tda18271_config = {
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.std_map = &hauppauge_tda18271_std_map,
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.gate = TDA18271_GATE_ANALOG,
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.output_opt = TDA18271_OUTPUT_LT_OFF,
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};
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static struct tda18271_config hauppauge_hvr1200_tuner_config = {
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.std_map = &hauppauge_hvr1200_tda18271_std_map,
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.gate = TDA18271_GATE_ANALOG,
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.output_opt = TDA18271_OUTPUT_LT_OFF,
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};
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static struct tda18271_config hauppauge_hvr1210_tuner_config = {
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.gate = TDA18271_GATE_DIGITAL,
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.output_opt = TDA18271_OUTPUT_LT_OFF,
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};
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static struct tda18271_std_map hauppauge_hvr127x_std_map = {
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.atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
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.if_lvl = 1, .rfagc_top = 0x58 },
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.qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
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.if_lvl = 1, .rfagc_top = 0x58 },
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};
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static struct tda18271_config hauppauge_hvr127x_config = {
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.std_map = &hauppauge_hvr127x_std_map,
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.output_opt = TDA18271_OUTPUT_LT_OFF,
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};
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static struct lgdt3305_config hauppauge_lgdt3305_config = {
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.i2c_addr = 0x0e,
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.mpeg_mode = LGDT3305_MPEG_SERIAL,
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.tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
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.tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
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.deny_i2c_rptr = 1,
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.spectral_inversion = 1,
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.qam_if_khz = 4000,
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.vsb_if_khz = 3250,
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};
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static struct dibx000_agc_config xc3028_agc_config = {
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BAND_VHF | BAND_UHF, /* band_caps */
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/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
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* P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
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* P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
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* P_agc_nb_est=2, P_agc_write=0
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*/
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(0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
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(3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
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712, /* inv_gain */
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21, /* time_stabiliz */
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0, /* alpha_level */
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118, /* thlock */
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0, /* wbd_inv */
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2867, /* wbd_ref */
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0, /* wbd_sel */
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2, /* wbd_alpha */
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0, /* agc1_max */
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0, /* agc1_min */
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39718, /* agc2_max */
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9930, /* agc2_min */
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0, /* agc1_pt1 */
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0, /* agc1_pt2 */
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0, /* agc1_pt3 */
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0, /* agc1_slope1 */
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0, /* agc1_slope2 */
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0, /* agc2_pt1 */
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128, /* agc2_pt2 */
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29, /* agc2_slope1 */
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29, /* agc2_slope2 */
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17, /* alpha_mant */
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27, /* alpha_exp */
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23, /* beta_mant */
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51, /* beta_exp */
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1, /* perform_agc_softsplit */
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};
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/* PLL Configuration for COFDM BW_MHz = 8.000000
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* With external clock = 30.000000 */
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static struct dibx000_bandwidth_config xc3028_bw_config = {
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60000, /* internal */
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30000, /* sampling */
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1, /* pll_cfg: prediv */
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8, /* pll_cfg: ratio */
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3, /* pll_cfg: range */
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1, /* pll_cfg: reset */
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0, /* pll_cfg: bypass */
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0, /* misc: refdiv */
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0, /* misc: bypclk_div */
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1, /* misc: IO_CLK_en_core */
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1, /* misc: ADClkSrc */
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0, /* misc: modulo */
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(3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
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(1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
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20452225, /* timf */
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30000000 /* xtal_hz */
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};
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static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
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.output_mpeg2_in_188_bytes = 1,
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.hostbus_diversity = 1,
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.tuner_is_baseband = 0,
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.update_lna = NULL,
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.agc_config_count = 1,
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.agc = &xc3028_agc_config,
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.bw = &xc3028_bw_config,
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.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
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.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
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.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
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.pwm_freq_div = 0,
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.agc_control = NULL,
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.spur_protect = 0,
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.output_mode = OUTMODE_MPEG2_SERIAL,
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};
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static struct zl10353_config dvico_fusionhdtv_xc3028 = {
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.demod_address = 0x0f,
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.if2 = 45600,
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.no_tuner = 1,
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.disable_i2c_gate_ctrl = 1,
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};
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static struct stv0900_reg stv0900_ts_regs[] = {
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{ R0900_TSGENERAL, 0x00 },
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{ R0900_P1_TSSPEED, 0x40 },
|
|
{ R0900_P2_TSSPEED, 0x40 },
|
|
{ R0900_P1_TSCFGM, 0xc0 },
|
|
{ R0900_P2_TSCFGM, 0xc0 },
|
|
{ R0900_P1_TSCFGH, 0xe0 },
|
|
{ R0900_P2_TSCFGH, 0xe0 },
|
|
{ R0900_P1_TSCFGL, 0x20 },
|
|
{ R0900_P2_TSCFGL, 0x20 },
|
|
{ 0xffff, 0xff }, /* terminate */
|
|
};
|
|
|
|
static struct stv0900_config netup_stv0900_config = {
|
|
.demod_address = 0x68,
|
|
.demod_mode = 1, /* dual */
|
|
.xtal = 8000000,
|
|
.clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
|
|
.diseqc_mode = 2,/* 2/3 PWM */
|
|
.ts_config_regs = stv0900_ts_regs,
|
|
.tun1_maddress = 0,/* 0x60 */
|
|
.tun2_maddress = 3,/* 0x63 */
|
|
.tun1_adc = 1,/* 1 Vpp */
|
|
.tun2_adc = 1,/* 1 Vpp */
|
|
};
|
|
|
|
static struct stv6110_config netup_stv6110_tunerconfig_a = {
|
|
.i2c_address = 0x60,
|
|
.mclk = 16000000,
|
|
.clk_div = 1,
|
|
.gain = 8, /* +16 dB - maximum gain */
|
|
};
|
|
|
|
static struct stv6110_config netup_stv6110_tunerconfig_b = {
|
|
.i2c_address = 0x63,
|
|
.mclk = 16000000,
|
|
.clk_div = 1,
|
|
.gain = 8, /* +16 dB - maximum gain */
|
|
};
|
|
|
|
static struct cx24116_config tbs_cx24116_config = {
|
|
.demod_address = 0x55,
|
|
};
|
|
|
|
static struct ds3000_config tevii_ds3000_config = {
|
|
.demod_address = 0x68,
|
|
};
|
|
|
|
static struct cx24116_config dvbworld_cx24116_config = {
|
|
.demod_address = 0x05,
|
|
};
|
|
|
|
static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
|
|
.prod = LGS8GXX_PROD_LGS8GL5,
|
|
.demod_address = 0x19,
|
|
.serial_ts = 0,
|
|
.ts_clk_pol = 1,
|
|
.ts_clk_gated = 1,
|
|
.if_clk_freq = 30400, /* 30.4 MHz */
|
|
.if_freq = 5380, /* 5.38 MHz */
|
|
.if_neg_center = 1,
|
|
.ext_adc = 0,
|
|
.adc_signed = 0,
|
|
.if_neg_edge = 0,
|
|
};
|
|
|
|
static struct xc5000_config mygica_x8506_xc5000_config = {
|
|
.i2c_address = 0x61,
|
|
.if_khz = 5380,
|
|
};
|
|
|
|
static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
|
|
{
|
|
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
|
|
struct cx23885_tsport *port = fe->dvb->priv;
|
|
struct cx23885_dev *dev = port->dev;
|
|
|
|
switch (dev->board) {
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1275:
|
|
switch (p->modulation) {
|
|
case VSB_8:
|
|
cx23885_gpio_clear(dev, GPIO_5);
|
|
break;
|
|
case QAM_64:
|
|
case QAM_256:
|
|
default:
|
|
cx23885_gpio_set(dev, GPIO_5);
|
|
break;
|
|
}
|
|
break;
|
|
case CX23885_BOARD_MYGICA_X8506:
|
|
case CX23885_BOARD_MAGICPRO_PROHDTVE2:
|
|
/* Select Digital TV */
|
|
cx23885_gpio_set(dev, GPIO_0);
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
|
|
.prod = LGS8GXX_PROD_LGS8G75,
|
|
.demod_address = 0x19,
|
|
.serial_ts = 0,
|
|
.ts_clk_pol = 1,
|
|
.ts_clk_gated = 1,
|
|
.if_clk_freq = 30400, /* 30.4 MHz */
|
|
.if_freq = 6500, /* 6.50 MHz */
|
|
.if_neg_center = 1,
|
|
.ext_adc = 0,
|
|
.adc_signed = 1,
|
|
.adc_vpp = 2, /* 1.6 Vpp */
|
|
.if_neg_edge = 1,
|
|
};
|
|
|
|
static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
|
|
.i2c_address = 0x61,
|
|
.if_khz = 6500,
|
|
};
|
|
|
|
static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
|
|
.prod = ATBM8830_PROD_8830,
|
|
.demod_address = 0x44,
|
|
.serial_ts = 0,
|
|
.ts_sampling_edge = 1,
|
|
.ts_clk_gated = 0,
|
|
.osc_clk_freq = 30400, /* in kHz */
|
|
.if_freq = 0, /* zero IF */
|
|
.zif_swap_iq = 1,
|
|
.agc_min = 0x2E,
|
|
.agc_max = 0xFF,
|
|
.agc_hold_loop = 0,
|
|
};
|
|
|
|
static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
|
|
.i2c_address = 0x60,
|
|
.osc_clk = 20
|
|
};
|
|
|
|
static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
|
|
.prod = ATBM8830_PROD_8830,
|
|
.demod_address = 0x44,
|
|
.serial_ts = 1,
|
|
.ts_sampling_edge = 1,
|
|
.ts_clk_gated = 0,
|
|
.osc_clk_freq = 30400, /* in kHz */
|
|
.if_freq = 0, /* zero IF */
|
|
.zif_swap_iq = 1,
|
|
.agc_min = 0x2E,
|
|
.agc_max = 0xFF,
|
|
.agc_hold_loop = 0,
|
|
};
|
|
|
|
static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
|
|
.i2c_address = 0x60,
|
|
.osc_clk = 20
|
|
};
|
|
static struct stv0367_config netup_stv0367_config[] = {
|
|
{
|
|
.demod_address = 0x1c,
|
|
.xtal = 27000000,
|
|
.if_khz = 4500,
|
|
.if_iq_mode = 0,
|
|
.ts_mode = 1,
|
|
.clk_pol = 0,
|
|
}, {
|
|
.demod_address = 0x1d,
|
|
.xtal = 27000000,
|
|
.if_khz = 4500,
|
|
.if_iq_mode = 0,
|
|
.ts_mode = 1,
|
|
.clk_pol = 0,
|
|
},
|
|
};
|
|
|
|
static struct xc5000_config netup_xc5000_config[] = {
|
|
{
|
|
.i2c_address = 0x61,
|
|
.if_khz = 4500,
|
|
}, {
|
|
.i2c_address = 0x64,
|
|
.if_khz = 4500,
|
|
},
|
|
};
|
|
|
|
static struct drxk_config terratec_drxk_config[] = {
|
|
{
|
|
.adr = 0x29,
|
|
.no_i2c_bridge = 1,
|
|
}, {
|
|
.adr = 0x2a,
|
|
.no_i2c_bridge = 1,
|
|
},
|
|
};
|
|
|
|
static struct mt2063_config terratec_mt2063_config[] = {
|
|
{
|
|
.tuner_address = 0x60,
|
|
}, {
|
|
.tuner_address = 0x67,
|
|
},
|
|
};
|
|
|
|
int netup_altera_fpga_rw(void *device, int flag, int data, int read)
|
|
{
|
|
struct cx23885_dev *dev = (struct cx23885_dev *)device;
|
|
unsigned long timeout = jiffies + msecs_to_jiffies(1);
|
|
uint32_t mem = 0;
|
|
|
|
mem = cx_read(MC417_RWD);
|
|
if (read)
|
|
cx_set(MC417_OEN, ALT_DATA);
|
|
else {
|
|
cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
|
|
mem &= ~ALT_DATA;
|
|
mem |= (data & ALT_DATA);
|
|
}
|
|
|
|
if (flag)
|
|
mem |= ALT_AD_RG;
|
|
else
|
|
mem &= ~ALT_AD_RG;
|
|
|
|
mem &= ~ALT_CS;
|
|
if (read)
|
|
mem = (mem & ~ALT_RD) | ALT_WR;
|
|
else
|
|
mem = (mem & ~ALT_WR) | ALT_RD;
|
|
|
|
cx_write(MC417_RWD, mem); /* start RW cycle */
|
|
|
|
for (;;) {
|
|
mem = cx_read(MC417_RWD);
|
|
if ((mem & ALT_RDY) == 0)
|
|
break;
|
|
if (time_after(jiffies, timeout))
|
|
break;
|
|
udelay(1);
|
|
}
|
|
|
|
cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
|
|
if (read)
|
|
return mem & ALT_DATA;
|
|
|
|
return 0;
|
|
};
|
|
|
|
static int dvb_register(struct cx23885_tsport *port)
|
|
{
|
|
struct cx23885_dev *dev = port->dev;
|
|
struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
|
|
struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
|
|
int mfe_shared = 0; /* bus not shared by default */
|
|
int ret;
|
|
|
|
/* Get the first frontend */
|
|
fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
|
|
if (!fe0)
|
|
return -EINVAL;
|
|
|
|
/* init struct videobuf_dvb */
|
|
fe0->dvb.name = dev->name;
|
|
|
|
/* multi-frontend gate control is undefined or defaults to fe0 */
|
|
port->frontends.gate = 0;
|
|
|
|
/* Sets the gate control callback to be used by i2c command calls */
|
|
port->gate_ctrl = cx23885_dvb_gate_ctrl;
|
|
|
|
/* init frontend */
|
|
switch (dev->board) {
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1250:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(s5h1409_attach,
|
|
&hauppauge_generic_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(mt2131_attach, fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
&hauppauge_generic_tunerconfig, 0);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1270:
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1275:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
|
|
&hauppauge_lgdt3305_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(tda18271_attach, fe0->dvb.frontend,
|
|
0x60, &dev->i2c_bus[1].i2c_adap,
|
|
&hauppauge_hvr127x_config);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1255:
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(s5h1411_attach,
|
|
&hcw_s5h1411_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(tda18271_attach, fe0->dvb.frontend,
|
|
0x60, &dev->i2c_bus[1].i2c_adap,
|
|
&hauppauge_tda18271_config);
|
|
}
|
|
|
|
tda18271_attach(&dev->ts1.analog_fe,
|
|
0x60, &dev->i2c_bus[1].i2c_adap,
|
|
&hauppauge_tda18271_config);
|
|
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1800:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
switch (alt_tuner) {
|
|
case 1:
|
|
fe0->dvb.frontend =
|
|
dvb_attach(s5h1409_attach,
|
|
&hauppauge_ezqam_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(tda829x_attach, fe0->dvb.frontend,
|
|
&dev->i2c_bus[1].i2c_adap, 0x42,
|
|
&tda829x_no_probe);
|
|
dvb_attach(tda18271_attach, fe0->dvb.frontend,
|
|
0x60, &dev->i2c_bus[1].i2c_adap,
|
|
&hauppauge_tda18271_config);
|
|
}
|
|
break;
|
|
case 0:
|
|
default:
|
|
fe0->dvb.frontend =
|
|
dvb_attach(s5h1409_attach,
|
|
&hauppauge_generic_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL)
|
|
dvb_attach(mt2131_attach, fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
&hauppauge_generic_tunerconfig, 0);
|
|
break;
|
|
}
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(s5h1409_attach,
|
|
&hauppauge_hvr1800lp_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(mt2131_attach, fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
&hauppauge_generic_tunerconfig, 0);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
|
|
&fusionhdtv_5_express,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap, 0x61,
|
|
TUNER_LG_TDVS_H06XF);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
|
|
i2c_bus = &dev->i2c_bus[1];
|
|
fe0->dvb.frontend = dvb_attach(s5h1409_attach,
|
|
&hauppauge_hvr1500q_config,
|
|
&dev->i2c_bus[0].i2c_adap);
|
|
if (fe0->dvb.frontend != NULL)
|
|
dvb_attach(xc5000_attach, fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
&hauppauge_hvr1500q_tunerconfig);
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1500:
|
|
i2c_bus = &dev->i2c_bus[1];
|
|
fe0->dvb.frontend = dvb_attach(s5h1409_attach,
|
|
&hauppauge_hvr1500_config,
|
|
&dev->i2c_bus[0].i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
struct dvb_frontend *fe;
|
|
struct xc2028_config cfg = {
|
|
.i2c_adap = &i2c_bus->i2c_adap,
|
|
.i2c_addr = 0x61,
|
|
};
|
|
static struct xc2028_ctrl ctl = {
|
|
.fname = XC2028_DEFAULT_FIRMWARE,
|
|
.max_len = 64,
|
|
.demod = XC3028_FE_OREN538,
|
|
};
|
|
|
|
fe = dvb_attach(xc2028_attach,
|
|
fe0->dvb.frontend, &cfg);
|
|
if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
|
|
fe->ops.tuner_ops.set_config(fe, &ctl);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1200:
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1700:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(tda10048_attach,
|
|
&hauppauge_hvr1200_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(tda829x_attach, fe0->dvb.frontend,
|
|
&dev->i2c_bus[1].i2c_adap, 0x42,
|
|
&tda829x_no_probe);
|
|
dvb_attach(tda18271_attach, fe0->dvb.frontend,
|
|
0x60, &dev->i2c_bus[1].i2c_adap,
|
|
&hauppauge_hvr1200_tuner_config);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1210:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(tda10048_attach,
|
|
&hauppauge_hvr1210_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(tda18271_attach, fe0->dvb.frontend,
|
|
0x60, &dev->i2c_bus[1].i2c_adap,
|
|
&hauppauge_hvr1210_tuner_config);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1400:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(dib7000p_attach,
|
|
&i2c_bus->i2c_adap,
|
|
0x12, &hauppauge_hvr1400_dib7000_config);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
struct dvb_frontend *fe;
|
|
struct xc2028_config cfg = {
|
|
.i2c_adap = &dev->i2c_bus[1].i2c_adap,
|
|
.i2c_addr = 0x64,
|
|
};
|
|
static struct xc2028_ctrl ctl = {
|
|
.fname = XC3028L_DEFAULT_FIRMWARE,
|
|
.max_len = 64,
|
|
.demod = XC3028_FE_DIBCOM52,
|
|
/* This is true for all demods with
|
|
v36 firmware? */
|
|
.type = XC2028_D2633,
|
|
};
|
|
|
|
fe = dvb_attach(xc2028_attach,
|
|
fe0->dvb.frontend, &cfg);
|
|
if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
|
|
fe->ops.tuner_ops.set_config(fe, &ctl);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
|
|
i2c_bus = &dev->i2c_bus[port->nr - 1];
|
|
|
|
fe0->dvb.frontend = dvb_attach(s5h1409_attach,
|
|
&dvico_s5h1409_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend == NULL)
|
|
fe0->dvb.frontend = dvb_attach(s5h1411_attach,
|
|
&dvico_s5h1411_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL)
|
|
dvb_attach(xc5000_attach, fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
&dvico_xc5000_tunerconfig);
|
|
break;
|
|
case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
|
|
i2c_bus = &dev->i2c_bus[port->nr - 1];
|
|
|
|
fe0->dvb.frontend = dvb_attach(zl10353_attach,
|
|
&dvico_fusionhdtv_xc3028,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
struct dvb_frontend *fe;
|
|
struct xc2028_config cfg = {
|
|
.i2c_adap = &i2c_bus->i2c_adap,
|
|
.i2c_addr = 0x61,
|
|
};
|
|
static struct xc2028_ctrl ctl = {
|
|
.fname = XC2028_DEFAULT_FIRMWARE,
|
|
.max_len = 64,
|
|
.demod = XC3028_FE_ZARLINK456,
|
|
};
|
|
|
|
fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
|
|
&cfg);
|
|
if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
|
|
fe->ops.tuner_ops.set_config(fe, &ctl);
|
|
}
|
|
break;
|
|
}
|
|
case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
|
|
case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
|
|
case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
|
|
fe0->dvb.frontend = dvb_attach(zl10353_attach,
|
|
&dvico_fusionhdtv_xc3028,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
struct dvb_frontend *fe;
|
|
struct xc2028_config cfg = {
|
|
.i2c_adap = &dev->i2c_bus[1].i2c_adap,
|
|
.i2c_addr = 0x61,
|
|
};
|
|
static struct xc2028_ctrl ctl = {
|
|
.fname = XC2028_DEFAULT_FIRMWARE,
|
|
.max_len = 64,
|
|
.demod = XC3028_FE_ZARLINK456,
|
|
};
|
|
|
|
fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
|
|
&cfg);
|
|
if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
|
|
fe->ops.tuner_ops.set_config(fe, &ctl);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
|
|
fe0->dvb.frontend = dvb_attach(zl10353_attach,
|
|
&dvico_fusionhdtv_xc3028,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
struct dvb_frontend *fe;
|
|
struct xc4000_config cfg = {
|
|
.i2c_address = 0x61,
|
|
.default_pm = 0,
|
|
.dvb_amplitude = 134,
|
|
.set_smoothedcvbs = 1,
|
|
.if_khz = 4560
|
|
};
|
|
|
|
fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
|
|
&dev->i2c_bus[1].i2c_adap, &cfg);
|
|
if (!fe) {
|
|
printk(KERN_ERR "%s/2: xc4000 attach failed\n",
|
|
dev->name);
|
|
goto frontend_detach;
|
|
}
|
|
}
|
|
break;
|
|
case CX23885_BOARD_TBS_6920:
|
|
i2c_bus = &dev->i2c_bus[1];
|
|
|
|
fe0->dvb.frontend = dvb_attach(cx24116_attach,
|
|
&tbs_cx24116_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL)
|
|
fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
|
|
|
|
break;
|
|
case CX23885_BOARD_TEVII_S470:
|
|
i2c_bus = &dev->i2c_bus[1];
|
|
|
|
fe0->dvb.frontend = dvb_attach(ds3000_attach,
|
|
&tevii_ds3000_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL)
|
|
fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
|
|
|
|
break;
|
|
case CX23885_BOARD_DVBWORLD_2005:
|
|
i2c_bus = &dev->i2c_bus[1];
|
|
|
|
fe0->dvb.frontend = dvb_attach(cx24116_attach,
|
|
&dvbworld_cx24116_config,
|
|
&i2c_bus->i2c_adap);
|
|
break;
|
|
case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
switch (port->nr) {
|
|
/* port B */
|
|
case 1:
|
|
fe0->dvb.frontend = dvb_attach(stv0900_attach,
|
|
&netup_stv0900_config,
|
|
&i2c_bus->i2c_adap, 0);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
if (dvb_attach(stv6110_attach,
|
|
fe0->dvb.frontend,
|
|
&netup_stv6110_tunerconfig_a,
|
|
&i2c_bus->i2c_adap)) {
|
|
if (!dvb_attach(lnbh24_attach,
|
|
fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
LNBH24_PCL | LNBH24_TTX,
|
|
LNBH24_TEN, 0x09))
|
|
printk(KERN_ERR
|
|
"No LNBH24 found!\n");
|
|
|
|
}
|
|
}
|
|
break;
|
|
/* port C */
|
|
case 2:
|
|
fe0->dvb.frontend = dvb_attach(stv0900_attach,
|
|
&netup_stv0900_config,
|
|
&i2c_bus->i2c_adap, 1);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
if (dvb_attach(stv6110_attach,
|
|
fe0->dvb.frontend,
|
|
&netup_stv6110_tunerconfig_b,
|
|
&i2c_bus->i2c_adap)) {
|
|
if (!dvb_attach(lnbh24_attach,
|
|
fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
LNBH24_PCL | LNBH24_TTX,
|
|
LNBH24_TEN, 0x0a))
|
|
printk(KERN_ERR
|
|
"No LNBH24 found!\n");
|
|
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
break;
|
|
case CX23885_BOARD_MYGICA_X8506:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
i2c_bus2 = &dev->i2c_bus[1];
|
|
fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
|
|
&mygica_x8506_lgs8gl5_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(xc5000_attach,
|
|
fe0->dvb.frontend,
|
|
&i2c_bus2->i2c_adap,
|
|
&mygica_x8506_xc5000_config);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_MAGICPRO_PROHDTVE2:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
i2c_bus2 = &dev->i2c_bus[1];
|
|
fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
|
|
&magicpro_prohdtve2_lgs8g75_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(xc5000_attach,
|
|
fe0->dvb.frontend,
|
|
&i2c_bus2->i2c_adap,
|
|
&magicpro_prohdtve2_xc5000_config);
|
|
}
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1850:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(s5h1411_attach,
|
|
&hcw_s5h1411_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL)
|
|
dvb_attach(tda18271_attach, fe0->dvb.frontend,
|
|
0x60, &dev->i2c_bus[0].i2c_adap,
|
|
&hauppauge_tda18271_config);
|
|
|
|
tda18271_attach(&dev->ts1.analog_fe,
|
|
0x60, &dev->i2c_bus[1].i2c_adap,
|
|
&hauppauge_tda18271_config);
|
|
|
|
break;
|
|
case CX23885_BOARD_HAUPPAUGE_HVR1290:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(s5h1411_attach,
|
|
&hcw_s5h1411_config,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL)
|
|
dvb_attach(tda18271_attach, fe0->dvb.frontend,
|
|
0x60, &dev->i2c_bus[0].i2c_adap,
|
|
&hauppauge_tda18271_config);
|
|
break;
|
|
case CX23885_BOARD_MYGICA_X8558PRO:
|
|
switch (port->nr) {
|
|
/* port B */
|
|
case 1:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
fe0->dvb.frontend = dvb_attach(atbm8830_attach,
|
|
&mygica_x8558pro_atbm8830_cfg1,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(max2165_attach,
|
|
fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
&mygic_x8558pro_max2165_cfg1);
|
|
}
|
|
break;
|
|
/* port C */
|
|
case 2:
|
|
i2c_bus = &dev->i2c_bus[1];
|
|
fe0->dvb.frontend = dvb_attach(atbm8830_attach,
|
|
&mygica_x8558pro_atbm8830_cfg2,
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
dvb_attach(max2165_attach,
|
|
fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
&mygic_x8558pro_max2165_cfg2);
|
|
}
|
|
break;
|
|
}
|
|
break;
|
|
case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
mfe_shared = 1;/* MFE */
|
|
port->frontends.gate = 0;/* not clear for me yet */
|
|
/* ports B, C */
|
|
/* MFE frontend 1 DVB-T */
|
|
fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
|
|
&netup_stv0367_config[port->nr - 1],
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
if (NULL == dvb_attach(xc5000_attach,
|
|
fe0->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
&netup_xc5000_config[port->nr - 1]))
|
|
goto frontend_detach;
|
|
/* load xc5000 firmware */
|
|
fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
|
|
}
|
|
/* MFE frontend 2 */
|
|
fe1 = videobuf_dvb_get_frontend(&port->frontends, 2);
|
|
if (fe1 == NULL)
|
|
goto frontend_detach;
|
|
/* DVB-C init */
|
|
fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
|
|
&netup_stv0367_config[port->nr - 1],
|
|
&i2c_bus->i2c_adap);
|
|
if (fe1->dvb.frontend != NULL) {
|
|
fe1->dvb.frontend->id = 1;
|
|
if (NULL == dvb_attach(xc5000_attach,
|
|
fe1->dvb.frontend,
|
|
&i2c_bus->i2c_adap,
|
|
&netup_xc5000_config[port->nr - 1]))
|
|
goto frontend_detach;
|
|
}
|
|
break;
|
|
case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
|
|
i2c_bus = &dev->i2c_bus[0];
|
|
i2c_bus2 = &dev->i2c_bus[1];
|
|
|
|
switch (port->nr) {
|
|
/* port b */
|
|
case 1:
|
|
fe0->dvb.frontend = dvb_attach(drxk_attach,
|
|
&terratec_drxk_config[0],
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
if (!dvb_attach(mt2063_attach,
|
|
fe0->dvb.frontend,
|
|
&terratec_mt2063_config[0],
|
|
&i2c_bus2->i2c_adap))
|
|
goto frontend_detach;
|
|
}
|
|
break;
|
|
/* port c */
|
|
case 2:
|
|
fe0->dvb.frontend = dvb_attach(drxk_attach,
|
|
&terratec_drxk_config[1],
|
|
&i2c_bus->i2c_adap);
|
|
if (fe0->dvb.frontend != NULL) {
|
|
if (!dvb_attach(mt2063_attach,
|
|
fe0->dvb.frontend,
|
|
&terratec_mt2063_config[1],
|
|
&i2c_bus2->i2c_adap))
|
|
goto frontend_detach;
|
|
}
|
|
break;
|
|
}
|
|
break;
|
|
case CX23885_BOARD_TEVII_S471:
|
|
i2c_bus = &dev->i2c_bus[1];
|
|
|
|
fe0->dvb.frontend = dvb_attach(ds3000_attach,
|
|
&tevii_ds3000_config,
|
|
&i2c_bus->i2c_adap);
|
|
break;
|
|
default:
|
|
printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
|
|
" isn't supported yet\n",
|
|
dev->name);
|
|
break;
|
|
}
|
|
|
|
if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
|
|
printk(KERN_ERR "%s: frontend initialization failed\n",
|
|
dev->name);
|
|
goto frontend_detach;
|
|
}
|
|
|
|
/* define general-purpose callback pointer */
|
|
fe0->dvb.frontend->callback = cx23885_tuner_callback;
|
|
if (fe1)
|
|
fe1->dvb.frontend->callback = cx23885_tuner_callback;
|
|
#if 0
|
|
/* Ensure all frontends negotiate bus access */
|
|
fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
|
|
if (fe1)
|
|
fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
|
|
#endif
|
|
|
|
/* Put the analog decoder in standby to keep it quiet */
|
|
call_all(dev, core, s_power, 0);
|
|
|
|
if (fe0->dvb.frontend->ops.analog_ops.standby)
|
|
fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
|
|
|
|
/* register everything */
|
|
ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
|
|
&dev->pci->dev, adapter_nr, mfe_shared,
|
|
NULL);
|
|
if (ret)
|
|
goto frontend_detach;
|
|
|
|
/* init CI & MAC */
|
|
switch (dev->board) {
|
|
case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
|
|
static struct netup_card_info cinfo;
|
|
|
|
netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
|
|
memcpy(port->frontends.adapter.proposed_mac,
|
|
cinfo.port[port->nr - 1].mac, 6);
|
|
printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
|
|
port->nr, port->frontends.adapter.proposed_mac);
|
|
|
|
netup_ci_init(port);
|
|
break;
|
|
}
|
|
case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
|
|
struct altera_ci_config netup_ci_cfg = {
|
|
.dev = dev,/* magic number to identify*/
|
|
.adapter = &port->frontends.adapter,/* for CI */
|
|
.demux = &fe0->dvb.demux,/* for hw pid filter */
|
|
.fpga_rw = netup_altera_fpga_rw,
|
|
};
|
|
|
|
altera_ci_init(&netup_ci_cfg, port->nr);
|
|
break;
|
|
}
|
|
case CX23885_BOARD_TEVII_S470: {
|
|
u8 eeprom[256]; /* 24C02 i2c eeprom */
|
|
|
|
if (port->nr != 1)
|
|
break;
|
|
|
|
/* Read entire EEPROM */
|
|
dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
|
|
tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
|
|
printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
|
|
memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
|
|
break;
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
|
|
frontend_detach:
|
|
port->gate_ctrl = NULL;
|
|
videobuf_dvb_dealloc_frontends(&port->frontends);
|
|
return -EINVAL;
|
|
}
|
|
|
|
int cx23885_dvb_register(struct cx23885_tsport *port)
|
|
{
|
|
|
|
struct videobuf_dvb_frontend *fe0;
|
|
struct cx23885_dev *dev = port->dev;
|
|
int err, i;
|
|
|
|
/* Here we need to allocate the correct number of frontends,
|
|
* as reflected in the cards struct. The reality is that currently
|
|
* no cx23885 boards support this - yet. But, if we don't modify this
|
|
* code then the second frontend would never be allocated (later)
|
|
* and fail with error before the attach in dvb_register().
|
|
* Without these changes we risk an OOPS later. The changes here
|
|
* are for safety, and should provide a good foundation for the
|
|
* future addition of any multi-frontend cx23885 based boards.
|
|
*/
|
|
printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
|
|
port->num_frontends);
|
|
|
|
for (i = 1; i <= port->num_frontends; i++) {
|
|
if (videobuf_dvb_alloc_frontend(
|
|
&port->frontends, i) == NULL) {
|
|
printk(KERN_ERR "%s() failed to alloc\n", __func__);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
|
|
if (!fe0)
|
|
err = -EINVAL;
|
|
|
|
dprintk(1, "%s\n", __func__);
|
|
dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
|
|
dev->board,
|
|
dev->name,
|
|
dev->pci_bus,
|
|
dev->pci_slot);
|
|
|
|
err = -ENODEV;
|
|
|
|
/* dvb stuff */
|
|
/* We have to init the queue for each frontend on a port. */
|
|
printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
|
|
videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
|
|
&dev->pci->dev, &port->slock,
|
|
V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
|
|
sizeof(struct cx23885_buffer), port, NULL);
|
|
}
|
|
err = dvb_register(port);
|
|
if (err != 0)
|
|
printk(KERN_ERR "%s() dvb_register failed err = %d\n",
|
|
__func__, err);
|
|
|
|
return err;
|
|
}
|
|
|
|
int cx23885_dvb_unregister(struct cx23885_tsport *port)
|
|
{
|
|
struct videobuf_dvb_frontend *fe0;
|
|
|
|
/* FIXME: in an error condition where the we have
|
|
* an expected number of frontends (attach problem)
|
|
* then this might not clean up correctly, if 1
|
|
* is invalid.
|
|
* This comment only applies to future boards IF they
|
|
* implement MFE support.
|
|
*/
|
|
fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
|
|
if (fe0 && fe0->dvb.frontend)
|
|
videobuf_dvb_unregister_bus(&port->frontends);
|
|
|
|
switch (port->dev->board) {
|
|
case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
|
|
netup_ci_exit(port);
|
|
break;
|
|
case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
|
|
altera_ci_release(port->dev, port->nr);
|
|
break;
|
|
}
|
|
|
|
port->gate_ctrl = NULL;
|
|
|
|
return 0;
|
|
}
|
|
|