a6c0f6eca1
The patch adds support for DaVinci cpu idle driver. Two idle states are defined: 1. Wait for interrupt 2. Wait for interrupt and DDR self-refresh (or power down) Some DaVinci SoCs support putting DDR in self-refresh (eg Dm644x, DM6467) while others support putting DDR in self-refresh and power down (eg DM35x, DA8xx). Putting DDR (or mDDR) in power down saves more power than self-refresh. The patch has been tested on DA850/OMAP-L138 EVM. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
17 lines
419 B
C
17 lines
419 B
C
/*
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* TI DaVinci cpuidle platform support
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*
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* 2009 (C) Texas Instruments, Inc. http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#ifndef _MACH_DAVINCI_CPUIDLE_H
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#define _MACH_DAVINCI_CPUIDLE_H
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struct davinci_cpuidle_config {
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u32 ddr2_pdown;
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};
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#endif
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