69 lines
2.4 KiB
C
69 lines
2.4 KiB
C
/*
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* dspioctl.h
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*
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* DSP-BIOS Bridge driver support functions for TI OMAP processors.
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*
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* Bridge driver BRD_IOCtl reserved command definitions.
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*
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* Copyright (C) 2005-2006 Texas Instruments, Inc.
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*
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* This package is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
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* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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*/
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#ifndef DSPIOCTL_
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#define DSPIOCTL_
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/* ------------------------------------ Hardware Abstraction Layer */
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#include <hw_defs.h>
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#include <hw_mmu.h>
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/*
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* Any IOCTLS at or above this value are reserved for standard Bridge driver
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* interfaces.
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*/
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#define BRDIOCTL_RESERVEDBASE 0x8000
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#define BRDIOCTL_CHNLREAD (BRDIOCTL_RESERVEDBASE + 0x10)
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#define BRDIOCTL_CHNLWRITE (BRDIOCTL_RESERVEDBASE + 0x20)
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/* DMMU */
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#define BRDIOCTL_SETMMUCONFIG (BRDIOCTL_RESERVEDBASE + 0x60)
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/* PWR */
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#define BRDIOCTL_PWRCONTROL (BRDIOCTL_RESERVEDBASE + 0x70)
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/* attention, modifiers:
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* Some of these control enumerations are made visible to user for power
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* control, so any changes to this list, should also be updated in the user
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* header file 'dbdefs.h' ***/
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/* These ioctls are reserved for PWR power commands for the DSP */
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#define BRDIOCTL_DEEPSLEEP (BRDIOCTL_PWRCONTROL + 0x0)
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#define BRDIOCTL_EMERGENCYSLEEP (BRDIOCTL_PWRCONTROL + 0x1)
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#define BRDIOCTL_WAKEUP (BRDIOCTL_PWRCONTROL + 0x2)
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#define BRDIOCTL_CLK_CTRL (BRDIOCTL_PWRCONTROL + 0x7)
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/* DSP Initiated Hibernate */
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#define BRDIOCTL_PWR_HIBERNATE (BRDIOCTL_PWRCONTROL + 0x8)
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#define BRDIOCTL_PRESCALE_NOTIFY (BRDIOCTL_PWRCONTROL + 0x9)
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#define BRDIOCTL_POSTSCALE_NOTIFY (BRDIOCTL_PWRCONTROL + 0xA)
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#define BRDIOCTL_CONSTRAINT_REQUEST (BRDIOCTL_PWRCONTROL + 0xB)
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/* Number of actual DSP-MMU TLB entrries */
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#define BRDIOCTL_NUMOFMMUTLB 32
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struct bridge_ioctl_extproc {
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u32 dsp_va; /* DSP virtual address */
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u32 gpp_pa; /* GPP physical address */
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/* GPP virtual address. __va does not work for ioremapped addresses */
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u32 gpp_va;
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u32 size; /* Size of the mapped memory in bytes */
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enum hw_endianism_t endianism;
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enum hw_mmu_mixed_size_t mixed_mode;
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enum hw_element_size_t elem_size;
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};
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#endif /* DSPIOCTL_ */
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