9bbafce2ee
Presently with preempt enabled there's the possibility to be preempted after the TIF_USEDFPU test and the register save, leading to bogus state post-__switch_to(). Use an explicit preempt_disable()/enable() pair around unlazy_fpu()/clear_fpu() to avoid this. Follows the x86 change. Reported-by: Takuo Koguchi <takuo.koguchi.sw@hitachi.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
279 lines
6.5 KiB
C
279 lines
6.5 KiB
C
#ifndef __ASM_SH_PROCESSOR_64_H
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#define __ASM_SH_PROCESSOR_64_H
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/*
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* include/asm-sh/processor_64.h
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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* Copyright (C) 2003 Paul Mundt
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* Copyright (C) 2004 Richard Curnow
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __ASSEMBLY__
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#include <linux/compiler.h>
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#include <asm/page.h>
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#include <asm/types.h>
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#include <asm/cache.h>
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#include <asm/ptrace.h>
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#include <asm/cpu/registers.h>
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/*
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* Default implementation of macro that returns current
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* instruction pointer ("program counter").
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*/
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#define current_text_addr() ({ \
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void *pc; \
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unsigned long long __dummy = 0; \
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__asm__("gettr tr0, %1\n\t" \
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"pta 4, tr0\n\t" \
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"gettr tr0, %0\n\t" \
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"ptabs %1, tr0\n\t" \
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:"=r" (pc), "=r" (__dummy) \
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: "1" (__dummy)); \
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pc; })
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/*
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* TLB information structure
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*
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* Defined for both I and D tlb, per-processor.
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*/
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struct tlb_info {
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unsigned long long next;
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unsigned long long first;
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unsigned long long last;
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unsigned int entries;
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unsigned int step;
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unsigned long flags;
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};
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struct sh_cpuinfo {
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enum cpu_type type;
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unsigned long loops_per_jiffy;
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unsigned long asid_cache;
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unsigned int cpu_clock, master_clock, bus_clock, module_clock;
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/* Cache info */
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struct cache_info icache;
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struct cache_info dcache;
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struct cache_info scache;
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/* TLB info */
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struct tlb_info itlb;
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struct tlb_info dtlb;
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unsigned long flags;
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};
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extern struct sh_cpuinfo cpu_data[];
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#define boot_cpu_data cpu_data[0]
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#define current_cpu_data cpu_data[smp_processor_id()]
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#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
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#endif
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/*
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* User space process size: 2GB - 4k.
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*/
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#define TASK_SIZE 0x7ffff000UL
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#define STACK_TOP TASK_SIZE
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#define STACK_TOP_MAX STACK_TOP
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/* This decides where the kernel will search for a free chunk of vm
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* space during mmap's.
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*/
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#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
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/*
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* Bit of SR register
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*
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* FD-bit:
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* When it's set, it means the processor doesn't have right to use FPU,
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* and it results exception when the floating operation is executed.
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*
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* IMASK-bit:
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* Interrupt level mask
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*
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* STEP-bit:
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* Single step bit
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*
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*/
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#if defined(CONFIG_SH64_SR_WATCH)
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#define SR_MMU 0x84000000
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#else
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#define SR_MMU 0x80000000
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#endif
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#define SR_IMASK 0x000000f0
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#define SR_FD 0x00008000
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#define SR_SSTEP 0x08000000
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#ifndef __ASSEMBLY__
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/*
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* FPU structure and data : require 8-byte alignment as we need to access it
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with fld.p, fst.p
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*/
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struct sh_fpu_hard_struct {
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unsigned long fp_regs[64];
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unsigned int fpscr;
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/* long status; * software status information */
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};
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#if 0
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/* Dummy fpu emulator */
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struct sh_fpu_soft_struct {
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unsigned long long fp_regs[32];
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unsigned int fpscr;
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unsigned char lookahead;
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unsigned long entry_pc;
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};
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#endif
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union sh_fpu_union {
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struct sh_fpu_hard_struct hard;
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/* 'hard' itself only produces 32 bit alignment, yet we need
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to access it using 64 bit load/store as well. */
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unsigned long long alignment_dummy;
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};
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struct thread_struct {
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unsigned long sp;
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unsigned long pc;
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/* This stores the address of the pt_regs built during a context
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switch, or of the register save area built for a kernel mode
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exception. It is used for backtracing the stack of a sleeping task
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or one that traps in kernel mode. */
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struct pt_regs *kregs;
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/* This stores the address of the pt_regs constructed on entry from
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user mode. It is a fixed value over the lifetime of a process, or
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NULL for a kernel thread. */
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struct pt_regs *uregs;
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unsigned long trap_no, error_code;
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unsigned long address;
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/* Hardware debugging registers may come here */
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/* floating point info */
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union sh_fpu_union fpu;
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};
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typedef struct {
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unsigned long seg;
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} mm_segment_t;
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#define INIT_MMAP \
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{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
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extern struct pt_regs fake_swapper_regs;
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#define INIT_THREAD { \
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.sp = sizeof(init_stack) + \
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(long) &init_stack, \
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.pc = 0, \
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.kregs = &fake_swapper_regs, \
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.uregs = NULL, \
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.trap_no = 0, \
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.error_code = 0, \
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.address = 0, \
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.fpu = { { { 0, } }, } \
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}
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/*
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* Do necessary setup to start up a newly executed thread.
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*/
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#define SR_USER (SR_MMU | SR_FD)
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#define start_thread(regs, new_pc, new_sp) \
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set_fs(USER_DS); \
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regs->sr = SR_USER; /* User mode. */ \
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regs->pc = new_pc - 4; /* Compensate syscall exit */ \
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regs->pc |= 1; /* Set SHmedia ! */ \
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regs->regs[18] = 0; \
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regs->regs[15] = new_sp
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/* Forward declaration, a strange C thing */
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struct task_struct;
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struct mm_struct;
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/* Free all resources held by a thread. */
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extern void release_thread(struct task_struct *);
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/*
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* create a kernel thread without removing it from tasklists
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*/
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extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
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/* Copy and release all segment info associated with a VM */
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#define copy_segments(p, mm) do { } while (0)
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#define release_segments(mm) do { } while (0)
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#define forget_segments() do { } while (0)
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#define prepare_to_copy(tsk) do { } while (0)
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/*
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* FPU lazy state save handling.
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*/
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static inline void disable_fpu(void)
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{
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unsigned long long __dummy;
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/* Set FD flag in SR */
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__asm__ __volatile__("getcon " __SR ", %0\n\t"
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"or %0, %1, %0\n\t"
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"putcon %0, " __SR "\n\t"
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: "=&r" (__dummy)
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: "r" (SR_FD));
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}
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static inline void enable_fpu(void)
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{
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unsigned long long __dummy;
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/* Clear out FD flag in SR */
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__asm__ __volatile__("getcon " __SR ", %0\n\t"
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"and %0, %1, %0\n\t"
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"putcon %0, " __SR "\n\t"
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: "=&r" (__dummy)
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: "r" (~SR_FD));
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}
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/* Round to nearest, no exceptions on inexact, overflow, underflow,
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zero-divide, invalid. Configure option for whether to flush denorms to
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zero, or except if a denorm is encountered. */
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#if defined(CONFIG_SH64_FPU_DENORM_FLUSH)
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#define FPSCR_INIT 0x00040000
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#else
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#define FPSCR_INIT 0x00000000
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#endif
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#ifdef CONFIG_SH_FPU
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/* Initialise the FP state of a task */
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void fpinit(struct sh_fpu_hard_struct *fpregs);
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#else
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#define fpinit(fpregs) do { } while (0)
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#endif
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extern struct task_struct *last_task_used_math;
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/*
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* Return saved PC of a blocked thread.
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*/
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#define thread_saved_pc(tsk) (tsk->thread.pc)
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extern unsigned long get_wchan(struct task_struct *p);
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#define KSTK_EIP(tsk) ((tsk)->thread.pc)
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#define KSTK_ESP(tsk) ((tsk)->thread.sp)
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#define cpu_relax() barrier()
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_SH_PROCESSOR_64_H */
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