4b550488f8
Hard to follow who is pointing what to where and why so it's simply getting in the way of the time code renovation. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
52 lines
1.4 KiB
C
52 lines
1.4 KiB
C
/*
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* time.c: MIPS CPU Count/Compare timer hookup
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*
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* Author: Mark.Zhan, <rongkai.zhan@windriver.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 2006, Wind River System Inc.
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*/
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#include <linux/init.h>
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/param.h> /* for HZ */
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#include <linux/irq.h>
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#include <linux/timex.h>
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#include <linux/interrupt.h>
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#include <asm/reboot.h>
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#include <asm/time.h>
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#include <asm/io.h>
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#include <asm/bootinfo.h>
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#include <asm/gt64120.h>
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#define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */
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void __init plat_timer_setup(struct irqaction *irq)
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{
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/* Install ISR for timer interrupt */
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setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq);
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}
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/*
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* Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
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*
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* NOTE: We disable all GT64120 timers, and use MIPS processor internal
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* timer as the source of kernel clock tick.
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*/
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void __init plat_time_init(void)
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{
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/* Disable GT64120 timers */
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GT_WRITE(GT_TC_CONTROL_OFS, 0x00);
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GT_WRITE(GT_TC0_OFS, 0x00);
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GT_WRITE(GT_TC1_OFS, 0x00);
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GT_WRITE(GT_TC2_OFS, 0x00);
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GT_WRITE(GT_TC3_OFS, 0x00);
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/* Use MIPS compare/count internal timer */
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mips_hpt_frequency = WRPPMC_CPU_CLK_FREQ;
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}
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