edb5a98e43
This patch adds platform data support to the s3mci driver. This allows flexible board-specific configuration of set_power, card detect and read only pins. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
70 lines
1.4 KiB
C
70 lines
1.4 KiB
C
/*
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* linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver
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*
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* Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* FIXME: DMA Resource management ?! */
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#define S3CMCI_DMA 0
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enum s3cmci_waitfor {
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COMPLETION_NONE,
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COMPLETION_FINALIZE,
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COMPLETION_CMDSENT,
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COMPLETION_RSPFIN,
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COMPLETION_XFERFINISH,
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COMPLETION_XFERFINISH_RSPFIN,
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};
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struct s3cmci_host {
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struct platform_device *pdev;
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struct s3c24xx_mci_pdata *pdata;
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struct mmc_host *mmc;
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struct resource *mem;
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struct clk *clk;
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void __iomem *base;
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int irq;
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int irq_cd;
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int dma;
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unsigned long clk_rate;
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unsigned long clk_div;
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unsigned long real_rate;
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u8 prescaler;
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int is2440;
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unsigned sdiimsk;
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unsigned sdidata;
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int dodma;
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int dmatogo;
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struct mmc_request *mrq;
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int cmd_is_stop;
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spinlock_t complete_lock;
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enum s3cmci_waitfor complete_what;
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int dma_complete;
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u32 pio_sgptr;
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u32 pio_words;
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u32 pio_count;
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u32 *pio_ptr;
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#define XFER_NONE 0
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#define XFER_READ 1
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#define XFER_WRITE 2
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u32 pio_active;
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int bus_width;
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char dbgmsg_cmd[301];
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char dbgmsg_dat[301];
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char *status;
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unsigned int ccnt, dcnt;
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struct tasklet_struct pio_tasklet;
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};
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