0415b00d17
Percpu allocator honors alignment request upto PAGE_SIZE and both the percpu addresses in the percpu address space and the translated kernel addresses should be aligned accordingly. The calculation of the former depends on the alignment of percpu output section in the kernel image. The linker script macros PERCPU_VADDR() and PERCPU() are used to define this output section and the latter takes @align parameter. Several architectures are using @align smaller than PAGE_SIZE breaking percpu memory alignment. This patch removes @align parameter from PERCPU(), renames it to PERCPU_SECTION() and makes it always align to PAGE_SIZE. While at it, add PCPU_SETUP_BUG_ON() checks such that alignment problems are reliably detected and remove percpu alignment comment recently added in workqueue.c as the condition would trigger BUG way before reaching there. For um, this patch raises the alignment of percpu area. As the area is in .init, there shouldn't be any noticeable difference. This problem was discovered by David Howells while debugging boot failure on mn10300. Signed-off-by: Tejun Heo <tj@kernel.org> Acked-by: Mike Frysinger <vapier@gentoo.org> Cc: uclinux-dist-devel@blackfin.uclinux.org Cc: David Howells <dhowells@redhat.com> Cc: Jeff Dike <jdike@addtoit.com> Cc: user-mode-linux-devel@lists.sourceforge.net
272 lines
4.9 KiB
ArmAsm
272 lines
4.9 KiB
ArmAsm
/*
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* Copyright 2004-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later
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*/
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/mem_map.h>
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#include <asm/page.h>
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#include <asm/thread_info.h>
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OUTPUT_FORMAT("elf32-bfin")
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ENTRY(__start)
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_jiffies = _jiffies_64;
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SECTIONS
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{
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#ifdef CONFIG_RAMKERNEL
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. = CONFIG_BOOT_LOAD;
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#else
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. = CONFIG_ROM_BASE;
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#endif
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/* Neither the text, ro_data or bss section need to be aligned
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* So pack them back to back
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*/
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.text :
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{
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__text = .;
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_text = .;
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__stext = .;
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TEXT_TEXT
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#ifndef CONFIG_SCHEDULE_L1
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SCHED_TEXT
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#endif
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LOCK_TEXT
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IRQENTRY_TEXT
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KPROBES_TEXT
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#ifdef CONFIG_ROMKERNEL
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__sinittext = .;
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INIT_TEXT
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__einittext = .;
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EXIT_TEXT
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#endif
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*(.text.*)
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*(.fixup)
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#if !L1_CODE_LENGTH
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*(.l1.text)
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#endif
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__etext = .;
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}
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EXCEPTION_TABLE(4)
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NOTES
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/* Just in case the first read only is a 32-bit access */
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RO_DATA(4)
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__rodata_end = .;
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#ifdef CONFIG_ROMKERNEL
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. = CONFIG_BOOT_LOAD;
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.bss : AT(__rodata_end)
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#else
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.bss :
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#endif
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{
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. = ALIGN(4);
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___bss_start = .;
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*(.bss .bss.*)
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*(COMMON)
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#if !L1_DATA_A_LENGTH
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*(.l1.bss)
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#endif
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#if !L1_DATA_B_LENGTH
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*(.l1.bss.B)
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#endif
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. = ALIGN(4);
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___bss_stop = .;
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}
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#if defined(CONFIG_ROMKERNEL)
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.data : AT(LOADADDR(.bss) + SIZEOF(.bss))
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#else
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.data :
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#endif
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{
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__sdata = .;
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/* This gets done first, so the glob doesn't suck it in */
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CACHELINE_ALIGNED_DATA(32)
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#if !L1_DATA_A_LENGTH
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. = ALIGN(32);
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*(.data_l1.cacheline_aligned)
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*(.l1.data)
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#endif
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#if !L1_DATA_B_LENGTH
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*(.l1.data.B)
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#endif
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#if !L2_LENGTH
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. = ALIGN(32);
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*(.data_l2.cacheline_aligned)
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*(.l2.data)
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#endif
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DATA_DATA
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CONSTRUCTORS
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INIT_TASK_DATA(THREAD_SIZE)
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__edata = .;
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}
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__data_lma = LOADADDR(.data);
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__data_len = SIZEOF(.data);
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/* The init section should be last, so when we free it, it goes into
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* the general memory pool, and (hopefully) will decrease fragmentation
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* a tiny bit. The init section has a _requirement_ that it be
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* PAGE_SIZE aligned
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*/
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. = ALIGN(PAGE_SIZE);
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___init_begin = .;
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#ifdef CONFIG_RAMKERNEL
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INIT_TEXT_SECTION(PAGE_SIZE)
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/* We have to discard exit text and such at runtime, not link time, to
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* handle embedded cross-section references (alt instructions, bug
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* table, eh_frame, etc...). We need all of our .text up front and
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* .data after it for PCREL call issues.
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*/
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.exit.text :
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{
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EXIT_TEXT
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}
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. = ALIGN(16);
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INIT_DATA_SECTION(16)
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PERCPU_SECTION(32)
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.exit.data :
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{
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EXIT_DATA
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}
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.text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data))
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#else
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.init.data : AT(__data_lma + __data_len)
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{
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__sinitdata = .;
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INIT_DATA
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INIT_SETUP(16)
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INIT_CALLS
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CON_INITCALL
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SECURITY_INITCALL
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INIT_RAM_FS
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. = ALIGN(4);
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___per_cpu_load = .;
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___per_cpu_start = .;
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*(.data.percpu.first)
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*(.data.percpu.page_aligned)
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*(.data.percpu)
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*(.data.percpu.shared_aligned)
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___per_cpu_end = .;
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EXIT_DATA
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__einitdata = .;
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}
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__init_data_lma = LOADADDR(.init.data);
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__init_data_len = SIZEOF(.init.data);
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__init_data_end = .;
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.text_l1 L1_CODE_START : AT(__init_data_lma + __init_data_len)
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#endif
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{
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. = ALIGN(4);
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__stext_l1 = .;
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*(.l1.text.head)
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*(.l1.text)
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#ifdef CONFIG_SCHEDULE_L1
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SCHED_TEXT
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#endif
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. = ALIGN(4);
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__etext_l1 = .;
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}
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__text_l1_lma = LOADADDR(.text_l1);
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__text_l1_len = SIZEOF(.text_l1);
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ASSERT (__text_l1_len <= L1_CODE_LENGTH, "L1 text overflow!")
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.data_l1 L1_DATA_A_START : AT(__text_l1_lma + __text_l1_len)
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{
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. = ALIGN(4);
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__sdata_l1 = .;
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*(.l1.data)
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__edata_l1 = .;
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. = ALIGN(32);
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*(.data_l1.cacheline_aligned)
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. = ALIGN(4);
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__sbss_l1 = .;
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*(.l1.bss)
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. = ALIGN(4);
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__ebss_l1 = .;
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}
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__data_l1_lma = LOADADDR(.data_l1);
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__data_l1_len = SIZEOF(.data_l1);
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ASSERT (__data_l1_len <= L1_DATA_A_LENGTH, "L1 data A overflow!")
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.data_b_l1 L1_DATA_B_START : AT(__data_l1_lma + __data_l1_len)
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{
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. = ALIGN(4);
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__sdata_b_l1 = .;
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*(.l1.data.B)
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__edata_b_l1 = .;
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. = ALIGN(4);
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__sbss_b_l1 = .;
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*(.l1.bss.B)
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. = ALIGN(4);
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__ebss_b_l1 = .;
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}
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__data_b_l1_lma = LOADADDR(.data_b_l1);
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__data_b_l1_len = SIZEOF(.data_b_l1);
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ASSERT (__data_b_l1_len <= L1_DATA_B_LENGTH, "L1 data B overflow!")
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.text_data_l2 L2_START : AT(__data_b_l1_lma + __data_b_l1_len)
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{
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. = ALIGN(4);
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__stext_l2 = .;
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*(.l2.text)
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. = ALIGN(4);
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__etext_l2 = .;
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. = ALIGN(4);
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__sdata_l2 = .;
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*(.l2.data)
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__edata_l2 = .;
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. = ALIGN(32);
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*(.data_l2.cacheline_aligned)
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. = ALIGN(4);
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__sbss_l2 = .;
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*(.l2.bss)
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. = ALIGN(4);
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__ebss_l2 = .;
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}
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__l2_lma = LOADADDR(.text_data_l2);
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__l2_len = SIZEOF(.text_data_l2);
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ASSERT (__l2_len <= L2_LENGTH, "L2 overflow!")
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/* Force trailing alignment of our init section so that when we
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* free our init memory, we don't leave behind a partial page.
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*/
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#ifdef CONFIG_RAMKERNEL
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. = __l2_lma + __l2_len;
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#else
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. = __init_data_end;
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#endif
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. = ALIGN(PAGE_SIZE);
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___init_end = .;
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__end =.;
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STABS_DEBUG
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DWARF_DEBUG
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DISCARDS
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}
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