9a8fd55899
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
34 lines
679 B
C
34 lines
679 B
C
/*
|
|
* include/asm-xtensa/ipc.h
|
|
*
|
|
* This file is subject to the terms and conditions of the GNU General
|
|
* Public License. See the file "COPYING" in the main directory of
|
|
* this archive for more details.
|
|
*
|
|
* Copyright (C) 2001 - 2005 Tensilica Inc.
|
|
*/
|
|
|
|
#ifndef _XTENSA_IPC_H
|
|
#define _XTENSA_IPC_H
|
|
|
|
struct ipc_kludge {
|
|
struct msgbuf __user *msgp;
|
|
long msgtyp;
|
|
};
|
|
|
|
#define SEMOP 1
|
|
#define SEMGET 2
|
|
#define SEMCTL 3
|
|
#define SEMTIMEDOP 4
|
|
#define MSGSND 11
|
|
#define MSGRCV 12
|
|
#define MSGGET 13
|
|
#define MSGCTL 14
|
|
#define SHMAT 21
|
|
#define SHMDT 22
|
|
#define SHMGET 23
|
|
#define SHMCTL 24
|
|
|
|
#define IPCCALL(version,op) ((version)<<16 | (op))
|
|
|
|
#endif /* _XTENSA_IPC_H */
|