Rafał Bilski 48b7bde0f6 [CPUFREQ] Longhaul - Workaround issues with APIC. ... There is no need to worry about local APIC. There is need to worry about I/O APIC, because I/O APIC is replacing good old 8259. According to Nehemiah datasheet VIA is using 3-wire bus to connect local APIC to I/O APIC. "[...] When IA32_APIC_BASE[11] is set to 0, processor APICs based on the 3-wire APIC bus cannot be generally re-enabled until a system hardware reset. The 3-wire bus looses track of arbitration that would be necessary for complete re-enabling. Certain (local) APIC functionality can be enabled. [...]" So we must set disable bit for each interrupt in I/O APIC registers. Same situation as for PIC - we must poke registers direcly. How to do this? I don't know. So at the moment it is better to fail. Signed-off-by: Rafał Bilski <rafalbilski@interia.pl> Signed-off-by: Dave Jones <davej@redhat.com>		2006-07-31 18:37:05 -04:00
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cpufreq	[CPUFREQ] Longhaul - Workaround issues with APIC.	2006-07-31 18:37:05 -04:00
mcheck	[PATCH] mce section fix	2006-07-31 13:28:37 -07:00
mtrr
amd.c	[PATCH] i386: move phys_proc_id and cpu_core_id to cpuinfo_x86	2006-06-27 17:32:37 -07:00
centaur.c
common.c	[PATCH] fix subarchitecture breakage with CONFIG_SCHED_SMT	2006-06-27 17:32:38 -07:00
cpu.h
cyrix.c	spelling fixes	2006-06-26 18:35:02 +02:00
intel.c	Remove obsolete #include <linux/config.h>	2006-06-30 19:25:36 +02:00
intel_cacheinfo.c	[PATCH] cpu hotplug: use hotplug version of registration in late inits	2006-07-31 13:28:39 -07:00
Makefile
nexgen.c
proc.c	[PATCH] i386: move phys_proc_id and cpu_core_id to cpuinfo_x86	2006-06-27 17:32:37 -07:00
rise.c
transmeta.c
umc.c