1efe4ce3ca
This implements kernel-level atomic rollback built on top of gUSA, as an alternative non-IRQ based atomicity method. This is generally a faster method for platforms that are lacking the LL/SC pairs that SH-4A and later use, and is only supportable on legacy cores. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
91 lines
1.7 KiB
C
91 lines
1.7 KiB
C
#ifndef __ASM_SH_BITOPS_IRQ_H
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#define __ASM_SH_BITOPS_IRQ_H
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static inline void set_bit(int nr, volatile void *addr)
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{
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int mask;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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*a |= mask;
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local_irq_restore(flags);
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}
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static inline void clear_bit(int nr, volatile void *addr)
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{
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int mask;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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*a &= ~mask;
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local_irq_restore(flags);
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}
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static inline void change_bit(int nr, volatile void *addr)
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{
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int mask;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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*a ^= mask;
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local_irq_restore(flags);
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}
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static inline int test_and_set_bit(int nr, volatile void *addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a |= mask;
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local_irq_restore(flags);
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return retval;
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}
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static inline int test_and_clear_bit(int nr, volatile void *addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a &= ~mask;
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local_irq_restore(flags);
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return retval;
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}
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static inline int test_and_change_bit(int nr, volatile void *addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a ^= mask;
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local_irq_restore(flags);
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return retval;
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}
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#endif /* __ASM_SH_BITOPS_IRQ_H */
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