d3029b4e03
/ssd/git/drm-core-next/drivers/gpu/drm/radeon/radeon_fence.c: In function ‘radeon_debugfs_fence_info’: /ssd/git/drm-core-next/drivers/gpu/drm/radeon/radeon_fence.c:606:7: warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 3 has type ‘long long int’ [-Wformat] Signed-off-by: Dave Airlie <airlied@redhat.com>
625 lines
17 KiB
C
625 lines
17 KiB
C
/*
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* Copyright 2009 Jerome Glisse.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors:
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* Jerome Glisse <glisse@freedesktop.org>
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* Dave Airlie
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*/
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#include <linux/seq_file.h>
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#include <linux/atomic.h>
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#include <linux/wait.h>
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#include <linux/list.h>
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#include <linux/kref.h>
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#include <linux/slab.h>
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#include "drmP.h"
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#include "drm.h"
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#include "radeon_reg.h"
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#include "radeon.h"
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#include "radeon_trace.h"
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static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring)
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{
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if (rdev->wb.enabled) {
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*rdev->fence_drv[ring].cpu_addr = cpu_to_le32(seq);
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} else {
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WREG32(rdev->fence_drv[ring].scratch_reg, seq);
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}
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}
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static u32 radeon_fence_read(struct radeon_device *rdev, int ring)
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{
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u32 seq = 0;
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if (rdev->wb.enabled) {
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seq = le32_to_cpu(*rdev->fence_drv[ring].cpu_addr);
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} else {
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seq = RREG32(rdev->fence_drv[ring].scratch_reg);
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}
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return seq;
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}
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int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
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{
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/* we are protected by the ring emission mutex */
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if (fence->seq && fence->seq < RADEON_FENCE_NOTEMITED_SEQ) {
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return 0;
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}
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fence->seq = ++rdev->fence_drv[fence->ring].seq;
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radeon_fence_ring_emit(rdev, fence->ring, fence);
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trace_radeon_fence_emit(rdev->ddev, fence->seq);
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return 0;
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}
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void radeon_fence_process(struct radeon_device *rdev, int ring)
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{
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uint64_t seq, last_seq;
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unsigned count_loop = 0;
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bool wake = false;
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/* Note there is a scenario here for an infinite loop but it's
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* very unlikely to happen. For it to happen, the current polling
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* process need to be interrupted by another process and another
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* process needs to update the last_seq btw the atomic read and
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* xchg of the current process.
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*
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* More over for this to go in infinite loop there need to be
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* continuously new fence signaled ie radeon_fence_read needs
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* to return a different value each time for both the currently
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* polling process and the other process that xchg the last_seq
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* btw atomic read and xchg of the current process. And the
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* value the other process set as last seq must be higher than
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* the seq value we just read. Which means that current process
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* need to be interrupted after radeon_fence_read and before
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* atomic xchg.
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*
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* To be even more safe we count the number of time we loop and
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* we bail after 10 loop just accepting the fact that we might
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* have temporarly set the last_seq not to the true real last
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* seq but to an older one.
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*/
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last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
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do {
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seq = radeon_fence_read(rdev, ring);
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seq |= last_seq & 0xffffffff00000000LL;
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if (seq < last_seq) {
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seq += 0x100000000LL;
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}
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if (seq == last_seq) {
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break;
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}
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/* If we loop over we don't want to return without
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* checking if a fence is signaled as it means that the
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* seq we just read is different from the previous on.
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*/
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wake = true;
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last_seq = seq;
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if ((count_loop++) > 10) {
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/* We looped over too many time leave with the
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* fact that we might have set an older fence
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* seq then the current real last seq as signaled
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* by the hw.
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*/
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break;
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}
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} while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq);
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if (wake) {
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rdev->fence_drv[ring].last_activity = jiffies;
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wake_up_all(&rdev->fence_queue);
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}
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}
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static void radeon_fence_destroy(struct kref *kref)
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{
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struct radeon_fence *fence;
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fence = container_of(kref, struct radeon_fence, kref);
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fence->seq = RADEON_FENCE_NOTEMITED_SEQ;
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kfree(fence);
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}
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int radeon_fence_create(struct radeon_device *rdev,
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struct radeon_fence **fence,
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int ring)
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{
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*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
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if ((*fence) == NULL) {
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return -ENOMEM;
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}
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kref_init(&((*fence)->kref));
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(*fence)->rdev = rdev;
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(*fence)->seq = RADEON_FENCE_NOTEMITED_SEQ;
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(*fence)->ring = ring;
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return 0;
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}
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static bool radeon_fence_seq_signaled(struct radeon_device *rdev,
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u64 seq, unsigned ring)
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{
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if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
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return true;
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}
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/* poll new last sequence at least once */
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radeon_fence_process(rdev, ring);
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if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
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return true;
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}
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return false;
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}
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bool radeon_fence_signaled(struct radeon_fence *fence)
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{
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if (!fence) {
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return true;
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}
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if (fence->seq == RADEON_FENCE_NOTEMITED_SEQ) {
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WARN(1, "Querying an unemitted fence : %p !\n", fence);
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return true;
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}
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if (fence->seq == RADEON_FENCE_SIGNALED_SEQ) {
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return true;
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}
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if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring)) {
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fence->seq = RADEON_FENCE_SIGNALED_SEQ;
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return true;
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}
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return false;
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}
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static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 target_seq,
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unsigned ring, bool intr, bool lock_ring)
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{
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unsigned long timeout, last_activity;
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uint64_t seq;
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unsigned i;
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bool signaled;
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int r;
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while (target_seq > atomic64_read(&rdev->fence_drv[ring].last_seq)) {
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if (!rdev->ring[ring].ready) {
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return -EBUSY;
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}
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timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;
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if (time_after(rdev->fence_drv[ring].last_activity, timeout)) {
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/* the normal case, timeout is somewhere before last_activity */
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timeout = rdev->fence_drv[ring].last_activity - timeout;
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} else {
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/* either jiffies wrapped around, or no fence was signaled in the last 500ms
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* anyway we will just wait for the minimum amount and then check for a lockup
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*/
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timeout = 1;
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}
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seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
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/* Save current last activity valuee, used to check for GPU lockups */
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last_activity = rdev->fence_drv[ring].last_activity;
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trace_radeon_fence_wait_begin(rdev->ddev, seq);
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radeon_irq_kms_sw_irq_get(rdev, ring);
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if (intr) {
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r = wait_event_interruptible_timeout(rdev->fence_queue,
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(signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
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timeout);
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} else {
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r = wait_event_timeout(rdev->fence_queue,
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(signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
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timeout);
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}
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radeon_irq_kms_sw_irq_put(rdev, ring);
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if (unlikely(r < 0)) {
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return r;
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}
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trace_radeon_fence_wait_end(rdev->ddev, seq);
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if (unlikely(!signaled)) {
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/* we were interrupted for some reason and fence
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* isn't signaled yet, resume waiting */
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if (r) {
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continue;
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}
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/* check if sequence value has changed since last_activity */
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if (seq != atomic64_read(&rdev->fence_drv[ring].last_seq)) {
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continue;
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}
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if (lock_ring) {
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mutex_lock(&rdev->ring_lock);
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}
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/* test if somebody else has already decided that this is a lockup */
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if (last_activity != rdev->fence_drv[ring].last_activity) {
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if (lock_ring) {
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mutex_unlock(&rdev->ring_lock);
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}
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continue;
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}
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if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) {
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/* good news we believe it's a lockup */
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dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016llx last fence id 0x%016llx)\n",
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target_seq, seq);
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/* change last activity so nobody else think there is a lockup */
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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rdev->fence_drv[i].last_activity = jiffies;
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}
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/* mark the ring as not ready any more */
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rdev->ring[ring].ready = false;
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if (lock_ring) {
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mutex_unlock(&rdev->ring_lock);
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}
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return -EDEADLK;
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}
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if (lock_ring) {
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mutex_unlock(&rdev->ring_lock);
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}
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}
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}
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return 0;
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}
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int radeon_fence_wait(struct radeon_fence *fence, bool intr)
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{
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int r;
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if (fence == NULL) {
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WARN(1, "Querying an invalid fence : %p !\n", fence);
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return -EINVAL;
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}
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r = radeon_fence_wait_seq(fence->rdev, fence->seq,
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fence->ring, intr, true);
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if (r) {
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return r;
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}
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fence->seq = RADEON_FENCE_SIGNALED_SEQ;
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return 0;
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}
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bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq)
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{
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unsigned i;
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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if (seq[i] && radeon_fence_seq_signaled(rdev, seq[i], i)) {
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return true;
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}
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}
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return false;
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}
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static int radeon_fence_wait_any_seq(struct radeon_device *rdev,
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u64 *target_seq, bool intr)
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{
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unsigned long timeout, last_activity, tmp;
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unsigned i, ring = RADEON_NUM_RINGS;
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bool signaled;
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int r;
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for (i = 0, last_activity = 0; i < RADEON_NUM_RINGS; ++i) {
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if (!target_seq[i]) {
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continue;
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}
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/* use the most recent one as indicator */
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if (time_after(rdev->fence_drv[i].last_activity, last_activity)) {
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last_activity = rdev->fence_drv[i].last_activity;
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}
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/* For lockup detection just pick the lowest ring we are
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* actively waiting for
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*/
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if (i < ring) {
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ring = i;
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}
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}
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/* nothing to wait for ? */
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if (ring == RADEON_NUM_RINGS) {
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return 0;
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}
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while (!radeon_fence_any_seq_signaled(rdev, target_seq)) {
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timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;
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if (time_after(last_activity, timeout)) {
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/* the normal case, timeout is somewhere before last_activity */
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timeout = last_activity - timeout;
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} else {
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/* either jiffies wrapped around, or no fence was signaled in the last 500ms
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* anyway we will just wait for the minimum amount and then check for a lockup
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*/
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timeout = 1;
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}
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trace_radeon_fence_wait_begin(rdev->ddev, target_seq[ring]);
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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if (target_seq[i]) {
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radeon_irq_kms_sw_irq_get(rdev, i);
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}
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}
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if (intr) {
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r = wait_event_interruptible_timeout(rdev->fence_queue,
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(signaled = radeon_fence_any_seq_signaled(rdev, target_seq)),
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timeout);
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} else {
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r = wait_event_timeout(rdev->fence_queue,
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(signaled = radeon_fence_any_seq_signaled(rdev, target_seq)),
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timeout);
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}
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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if (target_seq[i]) {
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radeon_irq_kms_sw_irq_put(rdev, i);
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}
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}
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if (unlikely(r < 0)) {
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return r;
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}
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trace_radeon_fence_wait_end(rdev->ddev, target_seq[ring]);
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if (unlikely(!signaled)) {
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/* we were interrupted for some reason and fence
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* isn't signaled yet, resume waiting */
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if (r) {
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continue;
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}
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mutex_lock(&rdev->ring_lock);
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for (i = 0, tmp = 0; i < RADEON_NUM_RINGS; ++i) {
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if (time_after(rdev->fence_drv[i].last_activity, tmp)) {
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tmp = rdev->fence_drv[i].last_activity;
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}
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}
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/* test if somebody else has already decided that this is a lockup */
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if (last_activity != tmp) {
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last_activity = tmp;
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mutex_unlock(&rdev->ring_lock);
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continue;
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}
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if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) {
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/* good news we believe it's a lockup */
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dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016llx)\n",
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target_seq[ring]);
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/* change last activity so nobody else think there is a lockup */
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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rdev->fence_drv[i].last_activity = jiffies;
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}
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/* mark the ring as not ready any more */
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rdev->ring[ring].ready = false;
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mutex_unlock(&rdev->ring_lock);
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return -EDEADLK;
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}
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mutex_unlock(&rdev->ring_lock);
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}
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}
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return 0;
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}
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int radeon_fence_wait_any(struct radeon_device *rdev,
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struct radeon_fence **fences,
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bool intr)
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{
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uint64_t seq[RADEON_NUM_RINGS];
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unsigned i;
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int r;
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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seq[i] = 0;
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if (!fences[i]) {
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continue;
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}
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if (fences[i]->seq == RADEON_FENCE_SIGNALED_SEQ) {
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/* something was allready signaled */
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return 0;
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}
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if (fences[i]->seq < RADEON_FENCE_NOTEMITED_SEQ) {
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seq[i] = fences[i]->seq;
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}
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}
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r = radeon_fence_wait_any_seq(rdev, seq, intr);
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if (r) {
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return r;
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}
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return 0;
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}
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int radeon_fence_wait_next_locked(struct radeon_device *rdev, int ring)
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{
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uint64_t seq;
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/* We are not protected by ring lock when reading current seq but
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* it's ok as worst case is we return to early while we could have
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* wait.
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*/
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seq = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL;
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if (seq >= rdev->fence_drv[ring].seq) {
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/* nothing to wait for, last_seq is
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already the last emited fence */
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return -ENOENT;
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}
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return radeon_fence_wait_seq(rdev, seq, ring, false, false);
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}
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int radeon_fence_wait_empty_locked(struct radeon_device *rdev, int ring)
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{
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/* We are not protected by ring lock when reading current seq
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* but it's ok as wait empty is call from place where no more
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* activity can be scheduled so there won't be concurrent access
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* to seq value.
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*/
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return radeon_fence_wait_seq(rdev, rdev->fence_drv[ring].seq,
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ring, false, false);
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}
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struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
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{
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kref_get(&fence->kref);
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return fence;
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}
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void radeon_fence_unref(struct radeon_fence **fence)
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{
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struct radeon_fence *tmp = *fence;
|
|
|
|
*fence = NULL;
|
|
if (tmp) {
|
|
kref_put(&tmp->kref, radeon_fence_destroy);
|
|
}
|
|
}
|
|
|
|
unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
|
|
{
|
|
uint64_t emitted;
|
|
|
|
/* We are not protected by ring lock when reading the last sequence
|
|
* but it's ok to report slightly wrong fence count here.
|
|
*/
|
|
radeon_fence_process(rdev, ring);
|
|
emitted = rdev->fence_drv[ring].seq - atomic64_read(&rdev->fence_drv[ring].last_seq);
|
|
/* to avoid 32bits warp around */
|
|
if (emitted > 0x10000000) {
|
|
emitted = 0x10000000;
|
|
}
|
|
return (unsigned)emitted;
|
|
}
|
|
|
|
int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
|
|
{
|
|
uint64_t index;
|
|
int r;
|
|
|
|
radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
|
|
if (rdev->wb.use_event) {
|
|
rdev->fence_drv[ring].scratch_reg = 0;
|
|
index = R600_WB_EVENT_OFFSET + ring * 4;
|
|
} else {
|
|
r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
|
|
if (r) {
|
|
dev_err(rdev->dev, "fence failed to get scratch register\n");
|
|
return r;
|
|
}
|
|
index = RADEON_WB_SCRATCH_OFFSET +
|
|
rdev->fence_drv[ring].scratch_reg -
|
|
rdev->scratch.reg_base;
|
|
}
|
|
rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4];
|
|
rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index;
|
|
radeon_fence_write(rdev, rdev->fence_drv[ring].seq, ring);
|
|
rdev->fence_drv[ring].initialized = true;
|
|
dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p\n",
|
|
ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);
|
|
return 0;
|
|
}
|
|
|
|
static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring)
|
|
{
|
|
rdev->fence_drv[ring].scratch_reg = -1;
|
|
rdev->fence_drv[ring].cpu_addr = NULL;
|
|
rdev->fence_drv[ring].gpu_addr = 0;
|
|
rdev->fence_drv[ring].seq = 0;
|
|
atomic64_set(&rdev->fence_drv[ring].last_seq, 0);
|
|
rdev->fence_drv[ring].last_activity = jiffies;
|
|
rdev->fence_drv[ring].initialized = false;
|
|
}
|
|
|
|
int radeon_fence_driver_init(struct radeon_device *rdev)
|
|
{
|
|
int ring;
|
|
|
|
init_waitqueue_head(&rdev->fence_queue);
|
|
for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
|
|
radeon_fence_driver_init_ring(rdev, ring);
|
|
}
|
|
if (radeon_debugfs_fence_init(rdev)) {
|
|
dev_err(rdev->dev, "fence debugfs file creation failed\n");
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
void radeon_fence_driver_fini(struct radeon_device *rdev)
|
|
{
|
|
int ring;
|
|
|
|
mutex_lock(&rdev->ring_lock);
|
|
for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
|
|
if (!rdev->fence_drv[ring].initialized)
|
|
continue;
|
|
radeon_fence_wait_empty_locked(rdev, ring);
|
|
wake_up_all(&rdev->fence_queue);
|
|
radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
|
|
rdev->fence_drv[ring].initialized = false;
|
|
}
|
|
mutex_unlock(&rdev->ring_lock);
|
|
}
|
|
|
|
|
|
/*
|
|
* Fence debugfs
|
|
*/
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *)m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
int i;
|
|
|
|
for (i = 0; i < RADEON_NUM_RINGS; ++i) {
|
|
if (!rdev->fence_drv[i].initialized)
|
|
continue;
|
|
|
|
seq_printf(m, "--- ring %d ---\n", i);
|
|
seq_printf(m, "Last signaled fence 0x%016llx\n",
|
|
(unsigned long long)atomic64_read(&rdev->fence_drv[i].last_seq));
|
|
seq_printf(m, "Last emitted 0x%016llx\n",
|
|
rdev->fence_drv[i].seq);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static struct drm_info_list radeon_debugfs_fence_list[] = {
|
|
{"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
|
|
};
|
|
#endif
|
|
|
|
int radeon_debugfs_fence_init(struct radeon_device *rdev)
|
|
{
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
|
|
#else
|
|
return 0;
|
|
#endif
|
|
}
|