1aee47a027
Only look in the 4 entries that could possibly contain the entry we're looking for. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
1077 lines
28 KiB
C
1077 lines
28 KiB
C
/*
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* Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Yu Liu, yu.liu@freescale.com
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*
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* Description:
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* This file is based on arch/powerpc/kvm/44x_tlb.c,
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* by Hollis Blanchard <hollisb@us.ibm.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/highmem.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_e500.h>
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#include "../mm/mmu_decl.h"
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#include "e500_tlb.h"
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#include "trace.h"
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#include "timing.h"
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#define to_htlb1_esel(esel) (tlb1_entry_num - (esel) - 1)
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struct id {
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unsigned long val;
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struct id **pentry;
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};
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#define NUM_TIDS 256
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/*
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* This table provide mappings from:
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* (guestAS,guestTID,guestPR) --> ID of physical cpu
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* guestAS [0..1]
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* guestTID [0..255]
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* guestPR [0..1]
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* ID [1..255]
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* Each vcpu keeps one vcpu_id_table.
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*/
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struct vcpu_id_table {
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struct id id[2][NUM_TIDS][2];
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};
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/*
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* This table provide reversed mappings of vcpu_id_table:
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* ID --> address of vcpu_id_table item.
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* Each physical core has one pcpu_id_table.
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*/
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struct pcpu_id_table {
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struct id *entry[NUM_TIDS];
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};
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static DEFINE_PER_CPU(struct pcpu_id_table, pcpu_sids);
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/* This variable keeps last used shadow ID on local core.
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* The valid range of shadow ID is [1..255] */
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static DEFINE_PER_CPU(unsigned long, pcpu_last_used_sid);
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static unsigned int tlb1_entry_num;
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/*
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* Allocate a free shadow id and setup a valid sid mapping in given entry.
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* A mapping is only valid when vcpu_id_table and pcpu_id_table are match.
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*
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* The caller must have preemption disabled, and keep it that way until
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* it has finished with the returned shadow id (either written into the
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* TLB or arch.shadow_pid, or discarded).
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*/
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static inline int local_sid_setup_one(struct id *entry)
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{
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unsigned long sid;
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int ret = -1;
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sid = ++(__get_cpu_var(pcpu_last_used_sid));
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if (sid < NUM_TIDS) {
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__get_cpu_var(pcpu_sids).entry[sid] = entry;
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entry->val = sid;
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entry->pentry = &__get_cpu_var(pcpu_sids).entry[sid];
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ret = sid;
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}
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/*
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* If sid == NUM_TIDS, we've run out of sids. We return -1, and
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* the caller will invalidate everything and start over.
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*
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* sid > NUM_TIDS indicates a race, which we disable preemption to
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* avoid.
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*/
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WARN_ON(sid > NUM_TIDS);
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return ret;
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}
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/*
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* Check if given entry contain a valid shadow id mapping.
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* An ID mapping is considered valid only if
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* both vcpu and pcpu know this mapping.
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*
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* The caller must have preemption disabled, and keep it that way until
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* it has finished with the returned shadow id (either written into the
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* TLB or arch.shadow_pid, or discarded).
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*/
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static inline int local_sid_lookup(struct id *entry)
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{
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if (entry && entry->val != 0 &&
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__get_cpu_var(pcpu_sids).entry[entry->val] == entry &&
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entry->pentry == &__get_cpu_var(pcpu_sids).entry[entry->val])
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return entry->val;
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return -1;
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}
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/* Invalidate all id mappings on local core */
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static inline void local_sid_destroy_all(void)
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{
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preempt_disable();
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__get_cpu_var(pcpu_last_used_sid) = 0;
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memset(&__get_cpu_var(pcpu_sids), 0, sizeof(__get_cpu_var(pcpu_sids)));
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preempt_enable();
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}
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static void *kvmppc_e500_id_table_alloc(struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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vcpu_e500->idt = kzalloc(sizeof(struct vcpu_id_table), GFP_KERNEL);
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return vcpu_e500->idt;
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}
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static void kvmppc_e500_id_table_free(struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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kfree(vcpu_e500->idt);
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}
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/* Invalidate all mappings on vcpu */
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static void kvmppc_e500_id_table_reset_all(struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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memset(vcpu_e500->idt, 0, sizeof(struct vcpu_id_table));
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/* Update shadow pid when mappings are changed */
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kvmppc_e500_recalc_shadow_pid(vcpu_e500);
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}
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/* Invalidate one ID mapping on vcpu */
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static inline void kvmppc_e500_id_table_reset_one(
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struct kvmppc_vcpu_e500 *vcpu_e500,
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int as, int pid, int pr)
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{
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struct vcpu_id_table *idt = vcpu_e500->idt;
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BUG_ON(as >= 2);
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BUG_ON(pid >= NUM_TIDS);
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BUG_ON(pr >= 2);
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idt->id[as][pid][pr].val = 0;
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idt->id[as][pid][pr].pentry = NULL;
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/* Update shadow pid when mappings are changed */
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kvmppc_e500_recalc_shadow_pid(vcpu_e500);
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}
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/*
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* Map guest (vcpu,AS,ID,PR) to physical core shadow id.
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* This function first lookup if a valid mapping exists,
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* if not, then creates a new one.
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*
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* The caller must have preemption disabled, and keep it that way until
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* it has finished with the returned shadow id (either written into the
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* TLB or arch.shadow_pid, or discarded).
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*/
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static unsigned int kvmppc_e500_get_sid(struct kvmppc_vcpu_e500 *vcpu_e500,
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unsigned int as, unsigned int gid,
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unsigned int pr, int avoid_recursion)
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{
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struct vcpu_id_table *idt = vcpu_e500->idt;
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int sid;
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BUG_ON(as >= 2);
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BUG_ON(gid >= NUM_TIDS);
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BUG_ON(pr >= 2);
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sid = local_sid_lookup(&idt->id[as][gid][pr]);
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while (sid <= 0) {
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/* No mapping yet */
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sid = local_sid_setup_one(&idt->id[as][gid][pr]);
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if (sid <= 0) {
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_tlbil_all();
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local_sid_destroy_all();
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}
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/* Update shadow pid when mappings are changed */
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if (!avoid_recursion)
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kvmppc_e500_recalc_shadow_pid(vcpu_e500);
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}
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return sid;
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}
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/* Map guest pid to shadow.
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* We use PID to keep shadow of current guest non-zero PID,
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* and use PID1 to keep shadow of guest zero PID.
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* So that guest tlbe with TID=0 can be accessed at any time */
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void kvmppc_e500_recalc_shadow_pid(struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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preempt_disable();
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vcpu_e500->vcpu.arch.shadow_pid = kvmppc_e500_get_sid(vcpu_e500,
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get_cur_as(&vcpu_e500->vcpu),
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get_cur_pid(&vcpu_e500->vcpu),
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get_cur_pr(&vcpu_e500->vcpu), 1);
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vcpu_e500->vcpu.arch.shadow_pid1 = kvmppc_e500_get_sid(vcpu_e500,
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get_cur_as(&vcpu_e500->vcpu), 0,
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get_cur_pr(&vcpu_e500->vcpu), 1);
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preempt_enable();
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}
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void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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struct tlbe *tlbe;
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int i, tlbsel;
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printk("| %8s | %8s | %8s | %8s | %8s |\n",
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"nr", "mas1", "mas2", "mas3", "mas7");
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for (tlbsel = 0; tlbsel < 2; tlbsel++) {
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printk("Guest TLB%d:\n", tlbsel);
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for (i = 0; i < vcpu_e500->gtlb_size[tlbsel]; i++) {
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tlbe = &vcpu_e500->gtlb_arch[tlbsel][i];
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if (tlbe->mas1 & MAS1_VALID)
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printk(" G[%d][%3d] | %08X | %08X | %08X | %08X |\n",
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tlbsel, i, tlbe->mas1, tlbe->mas2,
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tlbe->mas3, tlbe->mas7);
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}
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}
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}
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static inline unsigned int tlb0_get_next_victim(
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struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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unsigned int victim;
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victim = vcpu_e500->gtlb_nv[0]++;
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if (unlikely(vcpu_e500->gtlb_nv[0] >= KVM_E500_TLB0_WAY_NUM))
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vcpu_e500->gtlb_nv[0] = 0;
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return victim;
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}
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static inline unsigned int tlb1_max_shadow_size(void)
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{
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/* reserve one entry for magic page */
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return tlb1_entry_num - tlbcam_index - 1;
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}
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static inline int tlbe_is_writable(struct tlbe *tlbe)
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{
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return tlbe->mas3 & (MAS3_SW|MAS3_UW);
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}
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static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
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{
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/* Mask off reserved bits. */
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mas3 &= MAS3_ATTRIB_MASK;
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if (!usermode) {
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/* Guest is in supervisor mode,
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* so we need to translate guest
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* supervisor permissions into user permissions. */
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mas3 &= ~E500_TLB_USER_PERM_MASK;
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mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
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}
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return mas3 | E500_TLB_SUPER_PERM_MASK;
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}
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static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
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{
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#ifdef CONFIG_SMP
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return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
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#else
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return mas2 & MAS2_ATTRIB_MASK;
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#endif
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}
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/*
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* writing shadow tlb entry to host TLB
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*/
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static inline void __write_host_tlbe(struct tlbe *stlbe, uint32_t mas0)
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{
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unsigned long flags;
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local_irq_save(flags);
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mtspr(SPRN_MAS0, mas0);
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mtspr(SPRN_MAS1, stlbe->mas1);
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mtspr(SPRN_MAS2, stlbe->mas2);
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mtspr(SPRN_MAS3, stlbe->mas3);
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mtspr(SPRN_MAS7, stlbe->mas7);
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asm volatile("isync; tlbwe" : : : "memory");
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local_irq_restore(flags);
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}
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static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
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int tlbsel, int esel, struct tlbe *stlbe)
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{
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if (tlbsel == 0) {
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__write_host_tlbe(stlbe,
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MAS0_TLBSEL(0) |
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MAS0_ESEL(esel & (KVM_E500_TLB0_WAY_NUM - 1)));
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} else {
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__write_host_tlbe(stlbe,
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MAS0_TLBSEL(1) |
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MAS0_ESEL(to_htlb1_esel(esel)));
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}
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trace_kvm_stlb_write(index_of(tlbsel, esel), stlbe->mas1, stlbe->mas2,
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stlbe->mas3, stlbe->mas7);
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}
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void kvmppc_map_magic(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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struct tlbe magic;
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ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
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unsigned int stid;
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pfn_t pfn;
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pfn = (pfn_t)virt_to_phys((void *)shared_page) >> PAGE_SHIFT;
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get_page(pfn_to_page(pfn));
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preempt_disable();
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stid = kvmppc_e500_get_sid(vcpu_e500, 0, 0, 0, 0);
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magic.mas1 = MAS1_VALID | MAS1_TS | MAS1_TID(stid) |
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MAS1_TSIZE(BOOK3E_PAGESZ_4K);
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magic.mas2 = vcpu->arch.magic_page_ea | MAS2_M;
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magic.mas3 = (pfn << PAGE_SHIFT) |
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MAS3_SW | MAS3_SR | MAS3_UW | MAS3_UR;
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magic.mas7 = pfn >> (32 - PAGE_SHIFT);
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__write_host_tlbe(&magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index));
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preempt_enable();
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}
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void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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/* Shadow PID may be expired on local core */
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kvmppc_e500_recalc_shadow_pid(vcpu_e500);
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}
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void kvmppc_e500_tlb_put(struct kvm_vcpu *vcpu)
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{
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}
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static void kvmppc_e500_stlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
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int tlbsel, int esel)
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{
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struct tlbe *gtlbe = &vcpu_e500->gtlb_arch[tlbsel][esel];
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struct vcpu_id_table *idt = vcpu_e500->idt;
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unsigned int pr, tid, ts, pid;
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u32 val, eaddr;
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unsigned long flags;
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ts = get_tlb_ts(gtlbe);
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tid = get_tlb_tid(gtlbe);
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preempt_disable();
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/* One guest ID may be mapped to two shadow IDs */
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for (pr = 0; pr < 2; pr++) {
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/*
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* The shadow PID can have a valid mapping on at most one
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* host CPU. In the common case, it will be valid on this
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* CPU, in which case (for TLB0) we do a local invalidation
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* of the specific address.
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*
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* If the shadow PID is not valid on the current host CPU, or
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* if we're invalidating a TLB1 entry, we invalidate the
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* entire shadow PID.
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*/
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if (tlbsel == 1 ||
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(pid = local_sid_lookup(&idt->id[ts][tid][pr])) <= 0) {
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kvmppc_e500_id_table_reset_one(vcpu_e500, ts, tid, pr);
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continue;
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}
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/*
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* The guest is invalidating a TLB0 entry which is in a PID
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* that has a valid shadow mapping on this host CPU. We
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* search host TLB0 to invalidate it's shadow TLB entry,
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* similar to __tlbil_va except that we need to look in AS1.
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*/
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val = (pid << MAS6_SPID_SHIFT) | MAS6_SAS;
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eaddr = get_tlb_eaddr(gtlbe);
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local_irq_save(flags);
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mtspr(SPRN_MAS6, val);
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asm volatile("tlbsx 0, %[eaddr]" : : [eaddr] "r" (eaddr));
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val = mfspr(SPRN_MAS1);
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if (val & MAS1_VALID) {
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mtspr(SPRN_MAS1, val & ~MAS1_VALID);
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asm volatile("tlbwe");
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}
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local_irq_restore(flags);
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}
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preempt_enable();
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}
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/* Search the guest TLB for a matching entry. */
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static int kvmppc_e500_tlb_index(struct kvmppc_vcpu_e500 *vcpu_e500,
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gva_t eaddr, int tlbsel, unsigned int pid, int as)
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{
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int size = vcpu_e500->gtlb_size[tlbsel];
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int set_base;
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int i;
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if (tlbsel == 0) {
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int mask = size / KVM_E500_TLB0_WAY_NUM - 1;
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set_base = (eaddr >> PAGE_SHIFT) & mask;
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set_base *= KVM_E500_TLB0_WAY_NUM;
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size = KVM_E500_TLB0_WAY_NUM;
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} else {
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set_base = 0;
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}
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for (i = 0; i < size; i++) {
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struct tlbe *tlbe = &vcpu_e500->gtlb_arch[tlbsel][set_base + i];
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unsigned int tid;
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if (eaddr < get_tlb_eaddr(tlbe))
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continue;
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if (eaddr > get_tlb_end(tlbe))
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continue;
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tid = get_tlb_tid(tlbe);
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if (tid && (tid != pid))
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continue;
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if (!get_tlb_v(tlbe))
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continue;
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if (get_tlb_ts(tlbe) != as && as != -1)
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continue;
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return set_base + i;
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}
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return -1;
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}
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static inline void kvmppc_e500_priv_setup(struct tlbe_priv *priv,
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struct tlbe *gtlbe,
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pfn_t pfn)
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{
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priv->pfn = pfn;
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priv->flags = E500_TLB_VALID;
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if (tlbe_is_writable(gtlbe))
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priv->flags |= E500_TLB_DIRTY;
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}
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static inline void kvmppc_e500_priv_release(struct tlbe_priv *priv)
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{
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if (priv->flags & E500_TLB_VALID) {
|
|
if (priv->flags & E500_TLB_DIRTY)
|
|
kvm_release_pfn_dirty(priv->pfn);
|
|
else
|
|
kvm_release_pfn_clean(priv->pfn);
|
|
|
|
priv->flags = 0;
|
|
}
|
|
}
|
|
|
|
static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,
|
|
unsigned int eaddr, int as)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
unsigned int victim, pidsel, tsized;
|
|
int tlbsel;
|
|
|
|
/* since we only have two TLBs, only lower bit is used. */
|
|
tlbsel = (vcpu_e500->mas4 >> 28) & 0x1;
|
|
victim = (tlbsel == 0) ? tlb0_get_next_victim(vcpu_e500) : 0;
|
|
pidsel = (vcpu_e500->mas4 >> 16) & 0xf;
|
|
tsized = (vcpu_e500->mas4 >> 7) & 0x1f;
|
|
|
|
vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
|
|
| MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
|
|
vcpu_e500->mas1 = MAS1_VALID | (as ? MAS1_TS : 0)
|
|
| MAS1_TID(vcpu_e500->pid[pidsel])
|
|
| MAS1_TSIZE(tsized);
|
|
vcpu_e500->mas2 = (eaddr & MAS2_EPN)
|
|
| (vcpu_e500->mas4 & MAS2_ATTRIB_MASK);
|
|
vcpu_e500->mas3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
|
|
vcpu_e500->mas6 = (vcpu_e500->mas6 & MAS6_SPID1)
|
|
| (get_cur_pid(vcpu) << 16)
|
|
| (as ? MAS6_SAS : 0);
|
|
vcpu_e500->mas7 = 0;
|
|
}
|
|
|
|
static inline void kvmppc_e500_setup_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|
struct tlbe *gtlbe, int tsize,
|
|
struct tlbe_priv *priv,
|
|
u64 gvaddr, struct tlbe *stlbe)
|
|
{
|
|
pfn_t pfn = priv->pfn;
|
|
unsigned int stid;
|
|
|
|
stid = kvmppc_e500_get_sid(vcpu_e500, get_tlb_ts(gtlbe),
|
|
get_tlb_tid(gtlbe),
|
|
get_cur_pr(&vcpu_e500->vcpu), 0);
|
|
|
|
/* Force TS=1 IPROT=0 for all guest mappings. */
|
|
stlbe->mas1 = MAS1_TSIZE(tsize)
|
|
| MAS1_TID(stid) | MAS1_TS | MAS1_VALID;
|
|
stlbe->mas2 = (gvaddr & MAS2_EPN)
|
|
| e500_shadow_mas2_attrib(gtlbe->mas2,
|
|
vcpu_e500->vcpu.arch.shared->msr & MSR_PR);
|
|
stlbe->mas3 = ((pfn << PAGE_SHIFT) & MAS3_RPN)
|
|
| e500_shadow_mas3_attrib(gtlbe->mas3,
|
|
vcpu_e500->vcpu.arch.shared->msr & MSR_PR);
|
|
stlbe->mas7 = (pfn >> (32 - PAGE_SHIFT)) & MAS7_RPN;
|
|
}
|
|
|
|
|
|
static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|
u64 gvaddr, gfn_t gfn, struct tlbe *gtlbe, int tlbsel, int esel,
|
|
struct tlbe *stlbe)
|
|
{
|
|
struct kvm_memory_slot *slot;
|
|
unsigned long pfn, hva;
|
|
int pfnmap = 0;
|
|
int tsize = BOOK3E_PAGESZ_4K;
|
|
struct tlbe_priv *priv;
|
|
|
|
/*
|
|
* Translate guest physical to true physical, acquiring
|
|
* a page reference if it is normal, non-reserved memory.
|
|
*
|
|
* gfn_to_memslot() must succeed because otherwise we wouldn't
|
|
* have gotten this far. Eventually we should just pass the slot
|
|
* pointer through from the first lookup.
|
|
*/
|
|
slot = gfn_to_memslot(vcpu_e500->vcpu.kvm, gfn);
|
|
hva = gfn_to_hva_memslot(slot, gfn);
|
|
|
|
if (tlbsel == 1) {
|
|
struct vm_area_struct *vma;
|
|
down_read(¤t->mm->mmap_sem);
|
|
|
|
vma = find_vma(current->mm, hva);
|
|
if (vma && hva >= vma->vm_start &&
|
|
(vma->vm_flags & VM_PFNMAP)) {
|
|
/*
|
|
* This VMA is a physically contiguous region (e.g.
|
|
* /dev/mem) that bypasses normal Linux page
|
|
* management. Find the overlap between the
|
|
* vma and the memslot.
|
|
*/
|
|
|
|
unsigned long start, end;
|
|
unsigned long slot_start, slot_end;
|
|
|
|
pfnmap = 1;
|
|
|
|
start = vma->vm_pgoff;
|
|
end = start +
|
|
((vma->vm_end - vma->vm_start) >> PAGE_SHIFT);
|
|
|
|
pfn = start + ((hva - vma->vm_start) >> PAGE_SHIFT);
|
|
|
|
slot_start = pfn - (gfn - slot->base_gfn);
|
|
slot_end = slot_start + slot->npages;
|
|
|
|
if (start < slot_start)
|
|
start = slot_start;
|
|
if (end > slot_end)
|
|
end = slot_end;
|
|
|
|
tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
|
|
MAS1_TSIZE_SHIFT;
|
|
|
|
/*
|
|
* e500 doesn't implement the lowest tsize bit,
|
|
* or 1K pages.
|
|
*/
|
|
tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
|
|
|
|
/*
|
|
* Now find the largest tsize (up to what the guest
|
|
* requested) that will cover gfn, stay within the
|
|
* range, and for which gfn and pfn are mutually
|
|
* aligned.
|
|
*/
|
|
|
|
for (; tsize > BOOK3E_PAGESZ_4K; tsize -= 2) {
|
|
unsigned long gfn_start, gfn_end, tsize_pages;
|
|
tsize_pages = 1 << (tsize - 2);
|
|
|
|
gfn_start = gfn & ~(tsize_pages - 1);
|
|
gfn_end = gfn_start + tsize_pages;
|
|
|
|
if (gfn_start + pfn - gfn < start)
|
|
continue;
|
|
if (gfn_end + pfn - gfn > end)
|
|
continue;
|
|
if ((gfn & (tsize_pages - 1)) !=
|
|
(pfn & (tsize_pages - 1)))
|
|
continue;
|
|
|
|
gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
|
|
pfn &= ~(tsize_pages - 1);
|
|
break;
|
|
}
|
|
}
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
|
}
|
|
|
|
if (likely(!pfnmap)) {
|
|
pfn = gfn_to_pfn_memslot(vcpu_e500->vcpu.kvm, slot, gfn);
|
|
if (is_error_pfn(pfn)) {
|
|
printk(KERN_ERR "Couldn't get real page for gfn %lx!\n",
|
|
(long)gfn);
|
|
kvm_release_pfn_clean(pfn);
|
|
return;
|
|
}
|
|
}
|
|
|
|
/* Drop old priv and setup new one. */
|
|
priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
|
|
kvmppc_e500_priv_release(priv);
|
|
kvmppc_e500_priv_setup(priv, gtlbe, pfn);
|
|
|
|
kvmppc_e500_setup_stlbe(vcpu_e500, gtlbe, tsize, priv, gvaddr, stlbe);
|
|
}
|
|
|
|
/* XXX only map the one-one case, for now use TLB0 */
|
|
static int kvmppc_e500_tlb0_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|
int esel, struct tlbe *stlbe)
|
|
{
|
|
struct tlbe *gtlbe;
|
|
|
|
gtlbe = &vcpu_e500->gtlb_arch[0][esel];
|
|
|
|
kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
|
|
get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
|
|
gtlbe, 0, esel, stlbe);
|
|
|
|
return esel;
|
|
}
|
|
|
|
/* Caller must ensure that the specified guest TLB entry is safe to insert into
|
|
* the shadow TLB. */
|
|
/* XXX for both one-one and one-to-many , for now use TLB1 */
|
|
static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|
u64 gvaddr, gfn_t gfn, struct tlbe *gtlbe, struct tlbe *stlbe)
|
|
{
|
|
unsigned int victim;
|
|
|
|
victim = vcpu_e500->gtlb_nv[1]++;
|
|
|
|
if (unlikely(vcpu_e500->gtlb_nv[1] >= tlb1_max_shadow_size()))
|
|
vcpu_e500->gtlb_nv[1] = 0;
|
|
|
|
kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, victim, stlbe);
|
|
|
|
return victim;
|
|
}
|
|
|
|
void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
|
|
/* Recalc shadow pid since MSR changes */
|
|
kvmppc_e500_recalc_shadow_pid(vcpu_e500);
|
|
}
|
|
|
|
static inline int kvmppc_e500_gtlbe_invalidate(
|
|
struct kvmppc_vcpu_e500 *vcpu_e500,
|
|
int tlbsel, int esel)
|
|
{
|
|
struct tlbe *gtlbe = &vcpu_e500->gtlb_arch[tlbsel][esel];
|
|
|
|
if (unlikely(get_tlb_iprot(gtlbe)))
|
|
return -1;
|
|
|
|
gtlbe->mas1 = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500, ulong value)
|
|
{
|
|
int esel;
|
|
|
|
if (value & MMUCSR0_TLB0FI)
|
|
for (esel = 0; esel < vcpu_e500->gtlb_size[0]; esel++)
|
|
kvmppc_e500_gtlbe_invalidate(vcpu_e500, 0, esel);
|
|
if (value & MMUCSR0_TLB1FI)
|
|
for (esel = 0; esel < vcpu_e500->gtlb_size[1]; esel++)
|
|
kvmppc_e500_gtlbe_invalidate(vcpu_e500, 1, esel);
|
|
|
|
/* Invalidate all vcpu id mappings */
|
|
kvmppc_e500_id_table_reset_all(vcpu_e500);
|
|
|
|
return EMULATE_DONE;
|
|
}
|
|
|
|
int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
unsigned int ia;
|
|
int esel, tlbsel;
|
|
gva_t ea;
|
|
|
|
ea = ((ra) ? kvmppc_get_gpr(vcpu, ra) : 0) + kvmppc_get_gpr(vcpu, rb);
|
|
|
|
ia = (ea >> 2) & 0x1;
|
|
|
|
/* since we only have two TLBs, only lower bit is used. */
|
|
tlbsel = (ea >> 3) & 0x1;
|
|
|
|
if (ia) {
|
|
/* invalidate all entries */
|
|
for (esel = 0; esel < vcpu_e500->gtlb_size[tlbsel]; esel++)
|
|
kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
|
|
} else {
|
|
ea &= 0xfffff000;
|
|
esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel,
|
|
get_cur_pid(vcpu), -1);
|
|
if (esel >= 0)
|
|
kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
|
|
}
|
|
|
|
/* Invalidate all vcpu id mappings */
|
|
kvmppc_e500_id_table_reset_all(vcpu_e500);
|
|
|
|
return EMULATE_DONE;
|
|
}
|
|
|
|
int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
int tlbsel, esel;
|
|
struct tlbe *gtlbe;
|
|
|
|
tlbsel = get_tlb_tlbsel(vcpu_e500);
|
|
esel = get_tlb_esel(vcpu_e500, tlbsel);
|
|
|
|
gtlbe = &vcpu_e500->gtlb_arch[tlbsel][esel];
|
|
vcpu_e500->mas0 &= ~MAS0_NV(~0);
|
|
vcpu_e500->mas0 |= MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
|
|
vcpu_e500->mas1 = gtlbe->mas1;
|
|
vcpu_e500->mas2 = gtlbe->mas2;
|
|
vcpu_e500->mas3 = gtlbe->mas3;
|
|
vcpu_e500->mas7 = gtlbe->mas7;
|
|
|
|
return EMULATE_DONE;
|
|
}
|
|
|
|
int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
int as = !!get_cur_sas(vcpu_e500);
|
|
unsigned int pid = get_cur_spid(vcpu_e500);
|
|
int esel, tlbsel;
|
|
struct tlbe *gtlbe = NULL;
|
|
gva_t ea;
|
|
|
|
ea = kvmppc_get_gpr(vcpu, rb);
|
|
|
|
for (tlbsel = 0; tlbsel < 2; tlbsel++) {
|
|
esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as);
|
|
if (esel >= 0) {
|
|
gtlbe = &vcpu_e500->gtlb_arch[tlbsel][esel];
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (gtlbe) {
|
|
vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel)
|
|
| MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
|
|
vcpu_e500->mas1 = gtlbe->mas1;
|
|
vcpu_e500->mas2 = gtlbe->mas2;
|
|
vcpu_e500->mas3 = gtlbe->mas3;
|
|
vcpu_e500->mas7 = gtlbe->mas7;
|
|
} else {
|
|
int victim;
|
|
|
|
/* since we only have two TLBs, only lower bit is used. */
|
|
tlbsel = vcpu_e500->mas4 >> 28 & 0x1;
|
|
victim = (tlbsel == 0) ? tlb0_get_next_victim(vcpu_e500) : 0;
|
|
|
|
vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
|
|
| MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
|
|
vcpu_e500->mas1 = (vcpu_e500->mas6 & MAS6_SPID0)
|
|
| (vcpu_e500->mas6 & (MAS6_SAS ? MAS1_TS : 0))
|
|
| (vcpu_e500->mas4 & MAS4_TSIZED(~0));
|
|
vcpu_e500->mas2 &= MAS2_EPN;
|
|
vcpu_e500->mas2 |= vcpu_e500->mas4 & MAS2_ATTRIB_MASK;
|
|
vcpu_e500->mas3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
|
|
vcpu_e500->mas7 = 0;
|
|
}
|
|
|
|
kvmppc_set_exit_type(vcpu, EMULATED_TLBSX_EXITS);
|
|
return EMULATE_DONE;
|
|
}
|
|
|
|
int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
struct tlbe *gtlbe;
|
|
int tlbsel, esel;
|
|
|
|
tlbsel = get_tlb_tlbsel(vcpu_e500);
|
|
esel = get_tlb_esel(vcpu_e500, tlbsel);
|
|
|
|
gtlbe = &vcpu_e500->gtlb_arch[tlbsel][esel];
|
|
|
|
if (get_tlb_v(gtlbe))
|
|
kvmppc_e500_stlbe_invalidate(vcpu_e500, tlbsel, esel);
|
|
|
|
gtlbe->mas1 = vcpu_e500->mas1;
|
|
gtlbe->mas2 = vcpu_e500->mas2;
|
|
gtlbe->mas3 = vcpu_e500->mas3;
|
|
gtlbe->mas7 = vcpu_e500->mas7;
|
|
|
|
trace_kvm_gtlb_write(vcpu_e500->mas0, gtlbe->mas1, gtlbe->mas2,
|
|
gtlbe->mas3, gtlbe->mas7);
|
|
|
|
/* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
|
|
if (tlbe_is_host_safe(vcpu, gtlbe)) {
|
|
struct tlbe stlbe;
|
|
int stlbsel, sesel;
|
|
u64 eaddr;
|
|
u64 raddr;
|
|
|
|
preempt_disable();
|
|
switch (tlbsel) {
|
|
case 0:
|
|
/* TLB0 */
|
|
gtlbe->mas1 &= ~MAS1_TSIZE(~0);
|
|
gtlbe->mas1 |= MAS1_TSIZE(BOOK3E_PAGESZ_4K);
|
|
|
|
stlbsel = 0;
|
|
sesel = kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
|
|
|
|
break;
|
|
|
|
case 1:
|
|
/* TLB1 */
|
|
eaddr = get_tlb_eaddr(gtlbe);
|
|
raddr = get_tlb_raddr(gtlbe);
|
|
|
|
/* Create a 4KB mapping on the host.
|
|
* If the guest wanted a large page,
|
|
* only the first 4KB is mapped here and the rest
|
|
* are mapped on the fly. */
|
|
stlbsel = 1;
|
|
sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr,
|
|
raddr >> PAGE_SHIFT, gtlbe, &stlbe);
|
|
break;
|
|
|
|
default:
|
|
BUG();
|
|
}
|
|
write_host_tlbe(vcpu_e500, stlbsel, sesel, &stlbe);
|
|
preempt_enable();
|
|
}
|
|
|
|
kvmppc_set_exit_type(vcpu, EMULATED_TLBWE_EXITS);
|
|
return EMULATE_DONE;
|
|
}
|
|
|
|
int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
|
|
{
|
|
unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
|
|
|
|
return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
|
|
}
|
|
|
|
int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
|
|
{
|
|
unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
|
|
|
|
return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
|
|
}
|
|
|
|
void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
|
|
{
|
|
unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
|
|
|
|
kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.pc, as);
|
|
}
|
|
|
|
void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
|
|
{
|
|
unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
|
|
|
|
kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.fault_dear, as);
|
|
}
|
|
|
|
gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int index,
|
|
gva_t eaddr)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
struct tlbe *gtlbe =
|
|
&vcpu_e500->gtlb_arch[tlbsel_of(index)][esel_of(index)];
|
|
u64 pgmask = get_tlb_bytes(gtlbe) - 1;
|
|
|
|
return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
|
|
}
|
|
|
|
void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
|
|
{
|
|
}
|
|
|
|
void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
|
|
unsigned int index)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
struct tlbe_priv *priv;
|
|
struct tlbe *gtlbe, stlbe;
|
|
int tlbsel = tlbsel_of(index);
|
|
int esel = esel_of(index);
|
|
int stlbsel, sesel;
|
|
|
|
gtlbe = &vcpu_e500->gtlb_arch[tlbsel][esel];
|
|
|
|
preempt_disable();
|
|
switch (tlbsel) {
|
|
case 0:
|
|
stlbsel = 0;
|
|
sesel = esel;
|
|
priv = &vcpu_e500->gtlb_priv[stlbsel][sesel];
|
|
|
|
kvmppc_e500_setup_stlbe(vcpu_e500, gtlbe, BOOK3E_PAGESZ_4K,
|
|
priv, eaddr, &stlbe);
|
|
break;
|
|
|
|
case 1: {
|
|
gfn_t gfn = gpaddr >> PAGE_SHIFT;
|
|
|
|
stlbsel = 1;
|
|
sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn,
|
|
gtlbe, &stlbe);
|
|
break;
|
|
}
|
|
|
|
default:
|
|
BUG();
|
|
break;
|
|
}
|
|
|
|
write_host_tlbe(vcpu_e500, stlbsel, sesel, &stlbe);
|
|
preempt_enable();
|
|
}
|
|
|
|
int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
|
|
gva_t eaddr, unsigned int pid, int as)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
int esel, tlbsel;
|
|
|
|
for (tlbsel = 0; tlbsel < 2; tlbsel++) {
|
|
esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as);
|
|
if (esel >= 0)
|
|
return index_of(tlbsel, esel);
|
|
}
|
|
|
|
return -1;
|
|
}
|
|
|
|
void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
|
|
if (vcpu->arch.pid != pid) {
|
|
vcpu_e500->pid[0] = vcpu->arch.pid = pid;
|
|
kvmppc_e500_recalc_shadow_pid(vcpu_e500);
|
|
}
|
|
}
|
|
|
|
void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)
|
|
{
|
|
struct tlbe *tlbe;
|
|
|
|
/* Insert large initial mapping for guest. */
|
|
tlbe = &vcpu_e500->gtlb_arch[1][0];
|
|
tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_256M);
|
|
tlbe->mas2 = 0;
|
|
tlbe->mas3 = E500_TLB_SUPER_PERM_MASK;
|
|
tlbe->mas7 = 0;
|
|
|
|
/* 4K map for serial output. Used by kernel wrapper. */
|
|
tlbe = &vcpu_e500->gtlb_arch[1][1];
|
|
tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_4K);
|
|
tlbe->mas2 = (0xe0004500 & 0xFFFFF000) | MAS2_I | MAS2_G;
|
|
tlbe->mas3 = (0xe0004500 & 0xFFFFF000) | E500_TLB_SUPER_PERM_MASK;
|
|
tlbe->mas7 = 0;
|
|
}
|
|
|
|
int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
|
|
{
|
|
tlb1_entry_num = mfspr(SPRN_TLB1CFG) & 0xFFF;
|
|
|
|
vcpu_e500->gtlb_size[0] = KVM_E500_TLB0_SIZE;
|
|
vcpu_e500->gtlb_arch[0] =
|
|
kzalloc(sizeof(struct tlbe) * KVM_E500_TLB0_SIZE, GFP_KERNEL);
|
|
if (vcpu_e500->gtlb_arch[0] == NULL)
|
|
goto err_out;
|
|
|
|
vcpu_e500->gtlb_size[1] = KVM_E500_TLB1_SIZE;
|
|
vcpu_e500->gtlb_arch[1] =
|
|
kzalloc(sizeof(struct tlbe) * KVM_E500_TLB1_SIZE, GFP_KERNEL);
|
|
if (vcpu_e500->gtlb_arch[1] == NULL)
|
|
goto err_out_guest0;
|
|
|
|
vcpu_e500->gtlb_priv[0] = (struct tlbe_priv *)
|
|
kzalloc(sizeof(struct tlbe_priv) * KVM_E500_TLB0_SIZE, GFP_KERNEL);
|
|
if (vcpu_e500->gtlb_priv[0] == NULL)
|
|
goto err_out_guest1;
|
|
vcpu_e500->gtlb_priv[1] = (struct tlbe_priv *)
|
|
kzalloc(sizeof(struct tlbe_priv) * KVM_E500_TLB1_SIZE, GFP_KERNEL);
|
|
|
|
if (vcpu_e500->gtlb_priv[1] == NULL)
|
|
goto err_out_priv0;
|
|
|
|
if (kvmppc_e500_id_table_alloc(vcpu_e500) == NULL)
|
|
goto err_out_priv1;
|
|
|
|
/* Init TLB configuration register */
|
|
vcpu_e500->tlb0cfg = mfspr(SPRN_TLB0CFG) & ~0xfffUL;
|
|
vcpu_e500->tlb0cfg |= vcpu_e500->gtlb_size[0];
|
|
vcpu_e500->tlb1cfg = mfspr(SPRN_TLB1CFG) & ~0xfffUL;
|
|
vcpu_e500->tlb1cfg |= vcpu_e500->gtlb_size[1];
|
|
|
|
return 0;
|
|
|
|
err_out_priv1:
|
|
kfree(vcpu_e500->gtlb_priv[1]);
|
|
err_out_priv0:
|
|
kfree(vcpu_e500->gtlb_priv[0]);
|
|
err_out_guest1:
|
|
kfree(vcpu_e500->gtlb_arch[1]);
|
|
err_out_guest0:
|
|
kfree(vcpu_e500->gtlb_arch[0]);
|
|
err_out:
|
|
return -1;
|
|
}
|
|
|
|
void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
|
|
{
|
|
int stlbsel, i;
|
|
|
|
/* release all privs */
|
|
for (stlbsel = 0; stlbsel < 2; stlbsel++)
|
|
for (i = 0; i < vcpu_e500->gtlb_size[stlbsel]; i++) {
|
|
struct tlbe_priv *priv =
|
|
&vcpu_e500->gtlb_priv[stlbsel][i];
|
|
kvmppc_e500_priv_release(priv);
|
|
}
|
|
|
|
kvmppc_e500_id_table_free(vcpu_e500);
|
|
kfree(vcpu_e500->gtlb_arch[1]);
|
|
kfree(vcpu_e500->gtlb_arch[0]);
|
|
}
|