5a0e3ad6af
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
697 lines
16 KiB
C
697 lines
16 KiB
C
/* cpwd.c - driver implementation for hardware watchdog
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* timers found on Sun Microsystems CP1400 and CP1500 boards.
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*
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* This device supports both the generic Linux watchdog
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* interface and Solaris-compatible ioctls as best it is
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* able.
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*
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* NOTE: CP1400 systems appear to have a defective intr_mask
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* register on the PLD, preventing the disabling of
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* timer interrupts. We use a timer to periodically
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* reset 'stopped' watchdogs on affected platforms.
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*
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* Copyright (c) 2000 Eric Brower (ebrower@usa.net)
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* Copyright (C) 2008 David S. Miller <davem@davemloft.net>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/fs.h>
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#include <linux/errno.h>
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#include <linux/major.h>
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#include <linux/init.h>
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#include <linux/miscdevice.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/timer.h>
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#include <linux/slab.h>
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#include <linux/smp_lock.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/uaccess.h>
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#include <asm/irq.h>
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#include <asm/watchdog.h>
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#define DRIVER_NAME "cpwd"
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#define PFX DRIVER_NAME ": "
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#define WD_OBPNAME "watchdog"
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#define WD_BADMODEL "SUNW,501-5336"
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#define WD_BTIMEOUT (jiffies + (HZ * 1000))
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#define WD_BLIMIT 0xFFFF
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#define WD0_MINOR 212
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#define WD1_MINOR 213
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#define WD2_MINOR 214
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/* Internal driver definitions. */
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#define WD0_ID 0
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#define WD1_ID 1
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#define WD2_ID 2
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#define WD_NUMDEVS 3
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#define WD_INTR_OFF 0
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#define WD_INTR_ON 1
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#define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */
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#define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */
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#define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */
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/* Register value definitions
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*/
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#define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */
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#define WD1_INTR_MASK 0x02
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#define WD2_INTR_MASK 0x04
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#define WD_S_RUNNING 0x01 /* Watchdog device status running */
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#define WD_S_EXPIRED 0x02 /* Watchdog device status expired */
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struct cpwd {
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void __iomem *regs;
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spinlock_t lock;
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unsigned int irq;
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unsigned long timeout;
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bool enabled;
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bool reboot;
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bool broken;
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bool initialized;
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struct {
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struct miscdevice misc;
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void __iomem *regs;
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u8 intr_mask;
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u8 runstatus;
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u16 timeout;
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} devs[WD_NUMDEVS];
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};
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static struct cpwd *cpwd_device;
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/* Sun uses Altera PLD EPF8820ATC144-4
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* providing three hardware watchdogs:
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*
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* 1) RIC - sends an interrupt when triggered
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* 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
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* 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
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*
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*** Timer register block definition (struct wd_timer_regblk)
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*
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* dcntr and limit registers (halfword access):
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* -------------------
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* | 15 | ...| 1 | 0 |
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* -------------------
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* |- counter val -|
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* -------------------
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* dcntr - Current 16-bit downcounter value.
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* When downcounter reaches '0' watchdog expires.
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* Reading this register resets downcounter with
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* 'limit' value.
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* limit - 16-bit countdown value in 1/10th second increments.
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* Writing this register begins countdown with input value.
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* Reading from this register does not affect counter.
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* NOTES: After watchdog reset, dcntr and limit contain '1'
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*
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* status register (byte access):
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* ---------------------------
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* | 7 | ... | 2 | 1 | 0 |
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* --------------+------------
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* |- UNUSED -| EXP | RUN |
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* ---------------------------
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* status- Bit 0 - Watchdog is running
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* Bit 1 - Watchdog has expired
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*
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*** PLD register block definition (struct wd_pld_regblk)
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*
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* intr_mask register (byte access):
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* ---------------------------------
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* | 7 | ... | 3 | 2 | 1 | 0 |
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* +-------------+------------------
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* |- UNUSED -| WD3 | WD2 | WD1 |
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* ---------------------------------
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* WD3 - 1 == Interrupt disabled for watchdog 3
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* WD2 - 1 == Interrupt disabled for watchdog 2
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* WD1 - 1 == Interrupt disabled for watchdog 1
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*
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* pld_status register (byte access):
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* UNKNOWN, MAGICAL MYSTERY REGISTER
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*
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*/
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#define WD_TIMER_REGSZ 16
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#define WD0_OFF 0
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#define WD1_OFF (WD_TIMER_REGSZ * 1)
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#define WD2_OFF (WD_TIMER_REGSZ * 2)
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#define PLD_OFF (WD_TIMER_REGSZ * 3)
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#define WD_DCNTR 0x00
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#define WD_LIMIT 0x04
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#define WD_STATUS 0x08
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#define PLD_IMASK (PLD_OFF + 0x00)
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#define PLD_STATUS (PLD_OFF + 0x04)
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static struct timer_list cpwd_timer;
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static int wd0_timeout;
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static int wd1_timeout;
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static int wd2_timeout;
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module_param(wd0_timeout, int, 0);
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MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs");
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module_param(wd1_timeout, int, 0);
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MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs");
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module_param(wd2_timeout, int, 0);
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MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs");
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MODULE_AUTHOR("Eric Brower <ebrower@usa.net>");
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MODULE_DESCRIPTION("Hardware watchdog driver for Sun Microsystems CP1400/1500");
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MODULE_LICENSE("GPL");
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MODULE_SUPPORTED_DEVICE("watchdog");
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static void cpwd_writew(u16 val, void __iomem *addr)
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{
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writew(cpu_to_le16(val), addr);
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}
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static u16 cpwd_readw(void __iomem *addr)
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{
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u16 val = readw(addr);
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return le16_to_cpu(val);
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}
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static void cpwd_writeb(u8 val, void __iomem *addr)
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{
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writeb(val, addr);
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}
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static u8 cpwd_readb(void __iomem *addr)
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{
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return readb(addr);
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}
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/* Enable or disable watchdog interrupts
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* Because of the CP1400 defect this should only be
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* called during initialzation or by wd_[start|stop]timer()
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*
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* index - sub-device index, or -1 for 'all'
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* enable - non-zero to enable interrupts, zero to disable
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*/
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static void cpwd_toggleintr(struct cpwd *p, int index, int enable)
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{
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unsigned char curregs = cpwd_readb(p->regs + PLD_IMASK);
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unsigned char setregs =
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(index == -1) ?
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(WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) :
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(p->devs[index].intr_mask);
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if (enable == WD_INTR_ON)
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curregs &= ~setregs;
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else
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curregs |= setregs;
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cpwd_writeb(curregs, p->regs + PLD_IMASK);
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}
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/* Restarts timer with maximum limit value and
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* does not unset 'brokenstop' value.
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*/
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static void cpwd_resetbrokentimer(struct cpwd *p, int index)
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{
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cpwd_toggleintr(p, index, WD_INTR_ON);
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cpwd_writew(WD_BLIMIT, p->devs[index].regs + WD_LIMIT);
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}
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/* Timer method called to reset stopped watchdogs--
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* because of the PLD bug on CP1400, we cannot mask
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* interrupts within the PLD so me must continually
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* reset the timers ad infinitum.
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*/
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static void cpwd_brokentimer(unsigned long data)
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{
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struct cpwd *p = (struct cpwd *) data;
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int id, tripped = 0;
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/* kill a running timer instance, in case we
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* were called directly instead of by kernel timer
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*/
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if (timer_pending(&cpwd_timer))
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del_timer(&cpwd_timer);
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for (id = 0; id < WD_NUMDEVS; id++) {
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if (p->devs[id].runstatus & WD_STAT_BSTOP) {
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++tripped;
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cpwd_resetbrokentimer(p, id);
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}
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}
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if (tripped) {
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/* there is at least one timer brokenstopped-- reschedule */
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cpwd_timer.expires = WD_BTIMEOUT;
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add_timer(&cpwd_timer);
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}
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}
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/* Reset countdown timer with 'limit' value and continue countdown.
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* This will not start a stopped timer.
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*/
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static void cpwd_pingtimer(struct cpwd *p, int index)
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{
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if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING)
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cpwd_readw(p->devs[index].regs + WD_DCNTR);
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}
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/* Stop a running watchdog timer-- the timer actually keeps
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* running, but the interrupt is masked so that no action is
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* taken upon expiration.
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*/
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static void cpwd_stoptimer(struct cpwd *p, int index)
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{
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if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) {
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cpwd_toggleintr(p, index, WD_INTR_OFF);
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if (p->broken) {
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p->devs[index].runstatus |= WD_STAT_BSTOP;
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cpwd_brokentimer((unsigned long) p);
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}
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}
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}
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/* Start a watchdog timer with the specified limit value
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* If the watchdog is running, it will be restarted with
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* the provided limit value.
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*
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* This function will enable interrupts on the specified
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* watchdog.
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*/
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static void cpwd_starttimer(struct cpwd *p, int index)
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{
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if (p->broken)
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p->devs[index].runstatus &= ~WD_STAT_BSTOP;
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p->devs[index].runstatus &= ~WD_STAT_SVCD;
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cpwd_writew(p->devs[index].timeout, p->devs[index].regs + WD_LIMIT);
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cpwd_toggleintr(p, index, WD_INTR_ON);
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}
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static int cpwd_getstatus(struct cpwd *p, int index)
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{
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unsigned char stat = cpwd_readb(p->devs[index].regs + WD_STATUS);
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unsigned char intr = cpwd_readb(p->devs[index].regs + PLD_IMASK);
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unsigned char ret = WD_STOPPED;
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/* determine STOPPED */
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if (!stat)
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return ret;
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/* determine EXPIRED vs FREERUN vs RUNNING */
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else if (WD_S_EXPIRED & stat) {
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ret = WD_EXPIRED;
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} else if (WD_S_RUNNING & stat) {
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if (intr & p->devs[index].intr_mask) {
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ret = WD_FREERUN;
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} else {
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/* Fudge WD_EXPIRED status for defective CP1400--
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* IF timer is running
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* AND brokenstop is set
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* AND an interrupt has been serviced
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* we are WD_EXPIRED.
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*
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* IF timer is running
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* AND brokenstop is set
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* AND no interrupt has been serviced
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* we are WD_FREERUN.
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*/
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if (p->broken &&
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(p->devs[index].runstatus & WD_STAT_BSTOP)) {
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if (p->devs[index].runstatus & WD_STAT_SVCD) {
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ret = WD_EXPIRED;
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} else {
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/* we could as well pretend
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* we are expired */
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ret = WD_FREERUN;
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}
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} else {
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ret = WD_RUNNING;
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}
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}
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}
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/* determine SERVICED */
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if (p->devs[index].runstatus & WD_STAT_SVCD)
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ret |= WD_SERVICED;
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return ret;
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}
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static irqreturn_t cpwd_interrupt(int irq, void *dev_id)
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{
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struct cpwd *p = dev_id;
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/* Only WD0 will interrupt-- others are NMI and we won't
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* see them here....
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*/
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spin_lock_irq(&p->lock);
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cpwd_stoptimer(p, WD0_ID);
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p->devs[WD0_ID].runstatus |= WD_STAT_SVCD;
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spin_unlock_irq(&p->lock);
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return IRQ_HANDLED;
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}
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static int cpwd_open(struct inode *inode, struct file *f)
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{
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struct cpwd *p = cpwd_device;
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lock_kernel();
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switch (iminor(inode)) {
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case WD0_MINOR:
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case WD1_MINOR:
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case WD2_MINOR:
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break;
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default:
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unlock_kernel();
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return -ENODEV;
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}
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/* Register IRQ on first open of device */
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if (!p->initialized) {
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if (request_irq(p->irq, &cpwd_interrupt,
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IRQF_SHARED, DRIVER_NAME, p)) {
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printk(KERN_ERR PFX "Cannot register IRQ %d\n",
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p->irq);
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unlock_kernel();
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return -EBUSY;
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}
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p->initialized = true;
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}
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unlock_kernel();
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return nonseekable_open(inode, f);
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}
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static int cpwd_release(struct inode *inode, struct file *file)
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{
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return 0;
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}
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static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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{
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static const struct watchdog_info info = {
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.options = WDIOF_SETTIMEOUT,
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.firmware_version = 1,
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.identity = DRIVER_NAME,
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};
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void __user *argp = (void __user *)arg;
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struct inode *inode = file->f_path.dentry->d_inode;
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int index = iminor(inode) - WD0_MINOR;
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struct cpwd *p = cpwd_device;
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int setopt = 0;
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switch (cmd) {
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/* Generic Linux IOCTLs */
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case WDIOC_GETSUPPORT:
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if (copy_to_user(argp, &info, sizeof(struct watchdog_info)))
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return -EFAULT;
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break;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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if (put_user(0, (int __user *)argp))
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return -EFAULT;
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break;
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case WDIOC_KEEPALIVE:
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cpwd_pingtimer(p, index);
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break;
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case WDIOC_SETOPTIONS:
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if (copy_from_user(&setopt, argp, sizeof(unsigned int)))
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return -EFAULT;
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if (setopt & WDIOS_DISABLECARD) {
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if (p->enabled)
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return -EINVAL;
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cpwd_stoptimer(p, index);
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} else if (setopt & WDIOS_ENABLECARD) {
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cpwd_starttimer(p, index);
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} else {
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return -EINVAL;
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}
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break;
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/* Solaris-compatible IOCTLs */
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case WIOCGSTAT:
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setopt = cpwd_getstatus(p, index);
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if (copy_to_user(argp, &setopt, sizeof(unsigned int)))
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return -EFAULT;
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break;
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case WIOCSTART:
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cpwd_starttimer(p, index);
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break;
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case WIOCSTOP:
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if (p->enabled)
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return -EINVAL;
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cpwd_stoptimer(p, index);
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break;
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default:
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return -EINVAL;
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}
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return 0;
|
|
}
|
|
|
|
static long cpwd_compat_ioctl(struct file *file, unsigned int cmd,
|
|
unsigned long arg)
|
|
{
|
|
int rval = -ENOIOCTLCMD;
|
|
|
|
switch (cmd) {
|
|
/* solaris ioctls are specific to this driver */
|
|
case WIOCSTART:
|
|
case WIOCSTOP:
|
|
case WIOCGSTAT:
|
|
lock_kernel();
|
|
rval = cpwd_ioctl(file, cmd, arg);
|
|
unlock_kernel();
|
|
break;
|
|
|
|
/* everything else is handled by the generic compat layer */
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return rval;
|
|
}
|
|
|
|
static ssize_t cpwd_write(struct file *file, const char __user *buf,
|
|
size_t count, loff_t *ppos)
|
|
{
|
|
struct inode *inode = file->f_path.dentry->d_inode;
|
|
struct cpwd *p = cpwd_device;
|
|
int index = iminor(inode);
|
|
|
|
if (count) {
|
|
cpwd_pingtimer(p, index);
|
|
return 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t cpwd_read(struct file *file, char __user *buffer,
|
|
size_t count, loff_t *ppos)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static const struct file_operations cpwd_fops = {
|
|
.owner = THIS_MODULE,
|
|
.unlocked_ioctl = cpwd_ioctl,
|
|
.compat_ioctl = cpwd_compat_ioctl,
|
|
.open = cpwd_open,
|
|
.write = cpwd_write,
|
|
.read = cpwd_read,
|
|
.release = cpwd_release,
|
|
};
|
|
|
|
static int __devinit cpwd_probe(struct of_device *op,
|
|
const struct of_device_id *match)
|
|
{
|
|
struct device_node *options;
|
|
const char *str_prop;
|
|
const void *prop_val;
|
|
int i, err = -EINVAL;
|
|
struct cpwd *p;
|
|
|
|
if (cpwd_device)
|
|
return -EINVAL;
|
|
|
|
p = kzalloc(sizeof(*p), GFP_KERNEL);
|
|
err = -ENOMEM;
|
|
if (!p) {
|
|
printk(KERN_ERR PFX "Unable to allocate struct cpwd.\n");
|
|
goto out;
|
|
}
|
|
|
|
p->irq = op->irqs[0];
|
|
|
|
spin_lock_init(&p->lock);
|
|
|
|
p->regs = of_ioremap(&op->resource[0], 0,
|
|
4 * WD_TIMER_REGSZ, DRIVER_NAME);
|
|
if (!p->regs) {
|
|
printk(KERN_ERR PFX "Unable to map registers.\n");
|
|
goto out_free;
|
|
}
|
|
|
|
options = of_find_node_by_path("/options");
|
|
err = -ENODEV;
|
|
if (!options) {
|
|
printk(KERN_ERR PFX "Unable to find /options node.\n");
|
|
goto out_iounmap;
|
|
}
|
|
|
|
prop_val = of_get_property(options, "watchdog-enable?", NULL);
|
|
p->enabled = (prop_val ? true : false);
|
|
|
|
prop_val = of_get_property(options, "watchdog-reboot?", NULL);
|
|
p->reboot = (prop_val ? true : false);
|
|
|
|
str_prop = of_get_property(options, "watchdog-timeout", NULL);
|
|
if (str_prop)
|
|
p->timeout = simple_strtoul(str_prop, NULL, 10);
|
|
|
|
/* CP1400s seem to have broken PLD implementations-- the
|
|
* interrupt_mask register cannot be written, so no timer
|
|
* interrupts can be masked within the PLD.
|
|
*/
|
|
str_prop = of_get_property(op->node, "model", NULL);
|
|
p->broken = (str_prop && !strcmp(str_prop, WD_BADMODEL));
|
|
|
|
if (!p->enabled)
|
|
cpwd_toggleintr(p, -1, WD_INTR_OFF);
|
|
|
|
for (i = 0; i < WD_NUMDEVS; i++) {
|
|
static const char *cpwd_names[] = { "RIC", "XIR", "POR" };
|
|
static int *parms[] = { &wd0_timeout,
|
|
&wd1_timeout,
|
|
&wd2_timeout };
|
|
struct miscdevice *mp = &p->devs[i].misc;
|
|
|
|
mp->minor = WD0_MINOR + i;
|
|
mp->name = cpwd_names[i];
|
|
mp->fops = &cpwd_fops;
|
|
|
|
p->devs[i].regs = p->regs + (i * WD_TIMER_REGSZ);
|
|
p->devs[i].intr_mask = (WD0_INTR_MASK << i);
|
|
p->devs[i].runstatus &= ~WD_STAT_BSTOP;
|
|
p->devs[i].runstatus |= WD_STAT_INIT;
|
|
p->devs[i].timeout = p->timeout;
|
|
if (*parms[i])
|
|
p->devs[i].timeout = *parms[i];
|
|
|
|
err = misc_register(&p->devs[i].misc);
|
|
if (err) {
|
|
printk(KERN_ERR "Could not register misc device for "
|
|
"dev %d\n", i);
|
|
goto out_unregister;
|
|
}
|
|
}
|
|
|
|
if (p->broken) {
|
|
init_timer(&cpwd_timer);
|
|
cpwd_timer.function = cpwd_brokentimer;
|
|
cpwd_timer.data = (unsigned long) p;
|
|
cpwd_timer.expires = WD_BTIMEOUT;
|
|
|
|
printk(KERN_INFO PFX "PLD defect workaround enabled for "
|
|
"model " WD_BADMODEL ".\n");
|
|
}
|
|
|
|
dev_set_drvdata(&op->dev, p);
|
|
cpwd_device = p;
|
|
err = 0;
|
|
|
|
out:
|
|
return err;
|
|
|
|
out_unregister:
|
|
for (i--; i >= 0; i--)
|
|
misc_deregister(&p->devs[i].misc);
|
|
|
|
out_iounmap:
|
|
of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
|
|
|
|
out_free:
|
|
kfree(p);
|
|
goto out;
|
|
}
|
|
|
|
static int __devexit cpwd_remove(struct of_device *op)
|
|
{
|
|
struct cpwd *p = dev_get_drvdata(&op->dev);
|
|
int i;
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
misc_deregister(&p->devs[i].misc);
|
|
|
|
if (!p->enabled) {
|
|
cpwd_stoptimer(p, i);
|
|
if (p->devs[i].runstatus & WD_STAT_BSTOP)
|
|
cpwd_resetbrokentimer(p, i);
|
|
}
|
|
}
|
|
|
|
if (p->broken)
|
|
del_timer_sync(&cpwd_timer);
|
|
|
|
if (p->initialized)
|
|
free_irq(p->irq, p);
|
|
|
|
of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
|
|
kfree(p);
|
|
|
|
cpwd_device = NULL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id cpwd_match[] = {
|
|
{
|
|
.name = "watchdog",
|
|
},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, cpwd_match);
|
|
|
|
static struct of_platform_driver cpwd_driver = {
|
|
.name = DRIVER_NAME,
|
|
.match_table = cpwd_match,
|
|
.probe = cpwd_probe,
|
|
.remove = __devexit_p(cpwd_remove),
|
|
};
|
|
|
|
static int __init cpwd_init(void)
|
|
{
|
|
return of_register_driver(&cpwd_driver, &of_bus_type);
|
|
}
|
|
|
|
static void __exit cpwd_exit(void)
|
|
{
|
|
of_unregister_driver(&cpwd_driver);
|
|
}
|
|
|
|
module_init(cpwd_init);
|
|
module_exit(cpwd_exit);
|