fb702b942b
This model is based on the on-chip interrupt model used by the TILE-Gx next-generation hardware, and interacts much more cleanly with the Linux generic IRQ layer. The change includes modifications to the Tilera hypervisor, which are reflected in the hypervisor headers in arch/tile/include/arch/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Thomas Gleixner <tglx@linutronix.de>
147 lines
4.3 KiB
C
147 lines
4.3 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ASM_TILE_SMP_H
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#define _ASM_TILE_SMP_H
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#ifdef CONFIG_SMP
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#include <asm/processor.h>
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#include <linux/cpumask.h>
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#include <linux/irqreturn.h>
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#include <hv/hypervisor.h>
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/* Set up this tile to support receiving hypervisor messages */
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void init_messaging(void);
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/* Set up this tile to support receiving device interrupts and IPIs. */
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void init_per_tile_IRQs(void);
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/* Send a message to processors specified in mask */
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void send_IPI_many(const struct cpumask *mask, int tag);
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/* Send a message to all but the sending processor */
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void send_IPI_allbutself(int tag);
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/* Send a message to a specific processor */
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void send_IPI_single(int dest, int tag);
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/* Process an IPI message */
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void evaluate_message(int tag);
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/* Boot a secondary cpu */
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void online_secondary(void);
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/* Call a function on a specified set of CPUs (may include this one). */
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extern void on_each_cpu_mask(const struct cpumask *mask,
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void (*func)(void *), void *info, bool wait);
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/* Topology of the supervisor tile grid, and coordinates of boot processor */
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extern HV_Topology smp_topology;
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/* Accessors for grid size */
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#define smp_height (smp_topology.height)
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#define smp_width (smp_topology.width)
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/* Convenience functions for converting cpu <-> coords. */
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static inline int cpu_x(int cpu)
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{
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return cpu % smp_width;
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}
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static inline int cpu_y(int cpu)
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{
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return cpu / smp_width;
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}
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static inline int xy_to_cpu(int x, int y)
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{
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return y * smp_width + x;
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}
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/* Hypervisor message tags sent via the tile send_IPI*() routines. */
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#define MSG_TAG_START_CPU 1
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#define MSG_TAG_STOP_CPU 2
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#define MSG_TAG_CALL_FUNCTION_MANY 3
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#define MSG_TAG_CALL_FUNCTION_SINGLE 4
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/* Hook for the generic smp_call_function_many() routine. */
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static inline void arch_send_call_function_ipi_mask(struct cpumask *mask)
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{
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send_IPI_many(mask, MSG_TAG_CALL_FUNCTION_MANY);
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}
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/* Hook for the generic smp_call_function_single() routine. */
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static inline void arch_send_call_function_single_ipi(int cpu)
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{
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send_IPI_single(cpu, MSG_TAG_CALL_FUNCTION_SINGLE);
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}
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/* Print out the boot string describing which cpus were disabled. */
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void print_disabled_cpus(void);
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#else /* !CONFIG_SMP */
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#define on_each_cpu_mask(mask, func, info, wait) \
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do { if (cpumask_test_cpu(0, (mask))) func(info); } while (0)
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#define smp_master_cpu 0
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#define smp_height 1
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#define smp_width 1
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#define cpu_x(cpu) 0
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#define cpu_y(cpu) 0
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#define xy_to_cpu(x, y) 0
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#endif /* !CONFIG_SMP */
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/* Which cpus may be used as the lotar in a page table entry. */
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extern struct cpumask cpu_lotar_map;
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#define cpu_is_valid_lotar(cpu) cpumask_test_cpu((cpu), &cpu_lotar_map)
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#if CHIP_HAS_CBOX_HOME_MAP()
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/* Which processors are used for hash-for-home mapping */
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extern struct cpumask hash_for_home_map;
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#endif
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/* Which cpus can have their cache flushed by hv_flush_remote(). */
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extern struct cpumask cpu_cacheable_map;
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#define cpu_cacheable(cpu) cpumask_test_cpu((cpu), &cpu_cacheable_map)
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/* Convert an HV_LOTAR value into a cpu. */
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static inline int hv_lotar_to_cpu(HV_LOTAR lotar)
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{
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return HV_LOTAR_X(lotar) + (HV_LOTAR_Y(lotar) * smp_width);
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}
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/*
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* Extension of <linux/cpumask.h> functionality when you just want
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* to express a mask or suppression or inclusion region without
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* being too concerned about exactly which cpus are valid in that region.
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*/
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int bitmap_parselist_crop(const char *bp, unsigned long *maskp, int nmaskbits);
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#define cpulist_parse_crop(buf, dst) \
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__cpulist_parse_crop((buf), (dst), NR_CPUS)
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static inline int __cpulist_parse_crop(const char *buf, struct cpumask *dstp,
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int nbits)
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{
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return bitmap_parselist_crop(buf, cpumask_bits(dstp), nbits);
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}
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/* Initialize the IPI subsystem. */
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void ipi_init(void);
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/* Function for start-cpu message to cause us to jump to. */
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extern unsigned long start_cpu_function_addr;
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#endif /* _ASM_TILE_SMP_H */
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